1 | /* $NetBSD: firewire.h,v 1.6 2010/11/14 15:47:20 uebayasi Exp $ */ |
2 | /*- |
3 | * Copyright (c) 2003 Hidetoshi Shimokawa |
4 | * Copyright (c) 1998-2002 Katsushi Kobayashi and Hidetoshi Shimokawa |
5 | * All rights reserved. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
15 | * 3. All advertising materials mentioning features or use of this software |
16 | * must display the acknowledgement as bellow: |
17 | * |
18 | * This product includes software developed by K. Kobayashi and H. Shimokawa |
19 | * |
20 | * 4. The name of the author may not be used to endorse or promote products |
21 | * derived from this software without specific prior written permission. |
22 | * |
23 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
24 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
25 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
26 | * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, |
27 | * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
28 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
29 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
30 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
31 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
32 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
33 | * POSSIBILITY OF SUCH DAMAGE. |
34 | * |
35 | * $FreeBSD: src/sys/dev/firewire/firewire.h,v 1.25 2009/02/17 19:37:04 sbruno Exp $ |
36 | * |
37 | */ |
38 | |
39 | #ifndef _FIREWIRE_H_ |
40 | #define _FIREWIRE_H_ |
41 | |
42 | #include <sys/ioccom.h> |
43 | |
44 | #define DEV_DEF 0 |
45 | #define DEV_DV 2 |
46 | |
47 | struct fw_isochreq { |
48 | unsigned char ch:6, |
49 | tag:2; |
50 | }; |
51 | |
52 | struct fw_isobufreq { |
53 | struct fw_bufspec { |
54 | unsigned int nchunk; |
55 | unsigned int npacket; |
56 | unsigned int psize; |
57 | } tx, rx; |
58 | }; |
59 | |
60 | struct fw_addr { |
61 | uint32_t hi; |
62 | uint32_t lo; |
63 | }; |
64 | |
65 | struct fw_asybindreq { |
66 | struct fw_addr start; |
67 | unsigned long len; |
68 | }; |
69 | |
70 | struct fw_reg_req_t { |
71 | uint32_t addr; |
72 | uint32_t data; |
73 | }; |
74 | |
75 | #define MAXREC(x) (2 << (x)) |
76 | #define FWPMAX_S400 (2048 + 20) /* MAXREC plus space for control data */ |
77 | #define FWMAXQUEUE 256 |
78 | |
79 | #define FWLOCALBUS 0xffc0 |
80 | |
81 | #define FWTCODE_WREQQ 0 |
82 | #define FWTCODE_WREQB 1 |
83 | #define FWTCODE_WRES 2 |
84 | #define FWTCODE_RREQQ 4 |
85 | #define FWTCODE_RREQB 5 |
86 | #define FWTCODE_RRESQ 6 |
87 | #define FWTCODE_RRESB 7 |
88 | #define FWTCODE_CYCS 8 |
89 | #define FWTCODE_LREQ 9 |
90 | #define FWTCODE_STREAM 0xa |
91 | #define FWTCODE_LRES 0xb |
92 | #define FWTCODE_PHY 0xe |
93 | |
94 | #define FWRETRY_1 0 |
95 | #define FWRETRY_X 1 |
96 | #define FWRETRY_A 2 |
97 | #define FWRETRY_B 3 |
98 | |
99 | #define FWRCODE_COMPLETE 0 |
100 | #define FWRCODE_ER_CONFL 4 |
101 | #define FWRCODE_ER_DATA 5 |
102 | #define FWRCODE_ER_TYPE 6 |
103 | #define FWRCODE_ER_ADDR 7 |
104 | |
105 | /* |
106 | * Defined 1394a-2000 |
107 | * Table 5B-1 |
108 | */ |
109 | #define FWSPD_S100 0 |
110 | #define FWSPD_S200 1 |
111 | #define FWSPD_S400 2 |
112 | #define FWSPD_S800 3 |
113 | #define FWSPD_S1600 4 |
114 | #define FWSPD_S3200 5 |
115 | |
116 | #define FWP_TL_VALID (1 << 7) |
117 | |
118 | struct fw_isohdr { |
119 | uint32_t hdr[1]; |
120 | }; |
121 | |
122 | struct fw_asyhdr { |
123 | uint32_t hdr[4]; |
124 | }; |
125 | |
126 | #if BYTE_ORDER == BIG_ENDIAN |
127 | #define BIT4x2(x,y) uint8_t x:4, y:4 |
128 | #define BIT16x2(x,y) uint32_t x:16, y:16 |
129 | #else |
130 | #define BIT4x2(x,y) uint8_t y:4, x:4 |
131 | #define BIT16x2(x,y) uint32_t y:16, x:16 |
132 | #endif |
133 | |
134 | |
135 | #if BYTE_ORDER == BIG_ENDIAN |
136 | #define COMMON_HDR(a,b,c,d) uint32_t a:16,b:8,c:4,d:4 |
137 | #define COMMON_RES(a,b,c,d) uint32_t a:16,b:4,c:4,d:8 |
138 | #else |
139 | #define COMMON_HDR(a,b,c,d) uint32_t d:4,c:4,b:8,a:16 |
140 | #define COMMON_RES(a,b,c,d) uint32_t d:8,c:4,b:4,a:16 |
141 | #endif |
142 | |
143 | struct fw_pkt { |
144 | union { |
145 | uint32_t ld[0]; |
146 | struct { |
147 | COMMON_HDR(, , tcode, ); |
148 | } common; |
149 | struct { |
150 | COMMON_HDR(len, chtag, tcode, sy); |
151 | uint32_t payload[0]; |
152 | } stream; |
153 | struct { |
154 | COMMON_HDR(dst, tlrt, tcode, pri); |
155 | BIT16x2(src, ); |
156 | } hdr; |
157 | struct { |
158 | COMMON_HDR(dst, tlrt, tcode, pri); |
159 | BIT16x2(src, dest_hi); |
160 | uint32_t dest_lo; |
161 | } rreqq; |
162 | struct { |
163 | COMMON_HDR(dst, tlrt, tcode, pri); |
164 | COMMON_RES(src, rtcode, , ); |
165 | uint32_t :32; |
166 | } wres; |
167 | struct { |
168 | COMMON_HDR(dst, tlrt, tcode, pri); |
169 | BIT16x2(src, dest_hi); |
170 | uint32_t dest_lo; |
171 | BIT16x2(len, extcode); |
172 | } rreqb; |
173 | struct { |
174 | COMMON_HDR(dst, tlrt, tcode, pri); |
175 | BIT16x2(src, dest_hi); |
176 | uint32_t dest_lo; |
177 | uint32_t data; |
178 | } wreqq; |
179 | struct { |
180 | COMMON_HDR(dst, tlrt, tcode, pri); |
181 | BIT16x2(src, dest_hi); |
182 | uint32_t dest_lo; |
183 | uint32_t data; |
184 | } cyc; |
185 | struct { |
186 | COMMON_HDR(dst, tlrt, tcode, pri); |
187 | COMMON_RES(src, rtcode, , ); |
188 | uint32_t :32; |
189 | uint32_t data; |
190 | } rresq; |
191 | struct { |
192 | COMMON_HDR(dst, tlrt, tcode, pri); |
193 | BIT16x2(src, dest_hi); |
194 | uint32_t dest_lo; |
195 | BIT16x2(len, extcode); |
196 | uint32_t payload[0]; |
197 | } wreqb; |
198 | struct { |
199 | COMMON_HDR(dst, tlrt, tcode, pri); |
200 | BIT16x2(src, dest_hi); |
201 | uint32_t dest_lo; |
202 | BIT16x2(len, extcode); |
203 | uint32_t payload[0]; |
204 | } lreq; |
205 | struct { |
206 | COMMON_HDR(dst, tlrt, tcode, pri); |
207 | COMMON_RES(src, rtcode, , ); |
208 | uint32_t :32; |
209 | BIT16x2(len, extcode); |
210 | uint32_t payload[0]; |
211 | } rresb; |
212 | struct { |
213 | COMMON_HDR(dst, tlrt, tcode, pri); |
214 | COMMON_RES(src, rtcode, , ); |
215 | uint32_t :32; |
216 | BIT16x2(len, extcode); |
217 | uint32_t payload[0]; |
218 | } lres; |
219 | } mode; |
220 | }; |
221 | |
222 | /* |
223 | * Response code (rtcode) |
224 | */ |
225 | /* The node has successfully completed the command. */ |
226 | #define RESP_CMP 0 |
227 | /* A resource conflict was detected. The request may be retried. */ |
228 | #define RESP_CONFLICT_ERROR 4 |
229 | /* Hardware error, data is unavailable. */ |
230 | #define RESP_DATA_ERROR 5 |
231 | /* A field in the request packet header was set to an unsupported or incorrect |
232 | * value, or an invalid transaction was attempted (e.g., a write to a read-only |
233 | * address). */ |
234 | #define RESP_TYPE_ERROR 6 |
235 | /* The destination offset field in the request was set to an address not |
236 | * accessible in the destination node. */ |
237 | #define RESP_ADDRESS_ERROR 7 |
238 | |
239 | /* |
240 | * Extended transaction code (extcode) |
241 | */ |
242 | #define EXTCODE_MASK_SWAP 1 |
243 | #define EXTCODE_CMP_SWAP 2 |
244 | #define EXTCODE_FETCH_ADD 3 |
245 | #define EXTCODE_LITTLE_ADD 4 |
246 | #define EXTCODE_BOUNDED_ADD 5 |
247 | #define EXTCODE_WRAP_ADD 6 |
248 | |
249 | struct fw_eui64 { |
250 | uint32_t hi, lo; |
251 | }; |
252 | #define FW_EUI64_BYTE(eui, x) \ |
253 | ((((x)<4)? \ |
254 | ((eui)->hi >> (8*(3-(x)))): \ |
255 | ((eui)->lo >> (8*(7-(x)))) \ |
256 | ) & 0xff) |
257 | #define FW_EUI64_EQUAL(x, y) \ |
258 | ((x).hi == (y).hi && (x).lo == (y).lo) |
259 | |
260 | struct fw_asyreq { |
261 | struct fw_asyreq_t{ |
262 | unsigned char sped; |
263 | unsigned int type; |
264 | #define FWASREQNODE 0 |
265 | #define FWASREQEUI 1 |
266 | #define FWASRESTL 2 |
267 | #define FWASREQSTREAM 3 |
268 | unsigned short len; |
269 | union { |
270 | struct fw_eui64 eui; |
271 | }dst; |
272 | }req; |
273 | struct fw_pkt pkt; |
274 | uint32_t data[512]; |
275 | }; |
276 | |
277 | struct fw_devinfo { |
278 | struct fw_eui64 eui; |
279 | uint16_t dst; |
280 | uint16_t status; |
281 | }; |
282 | |
283 | #define FW_MAX_DEVLST 70 |
284 | struct fw_devlstreq { |
285 | uint16_t n; |
286 | uint16_t info_len; |
287 | struct fw_devinfo dev[FW_MAX_DEVLST]; |
288 | }; |
289 | |
290 | /* |
291 | * Defined in IEEE 1394a-2000 |
292 | * 4.3.4.1 |
293 | */ |
294 | #define FW_SELF_ID_PORT_CONNECTED_TO_CHILD 3 |
295 | #define FW_SELF_ID_PORT_CONNECTED_TO_PARENT 2 |
296 | #define FW_SELF_ID_PORT_NOT_CONNECTED 1 |
297 | #define FW_SELF_ID_PORT_NOT_EXISTS 0 |
298 | |
299 | #define FW_SELF_ID_PAGE0 0 |
300 | #define FW_SELF_ID_PAGE1 1 |
301 | |
302 | #if BYTE_ORDER == BIG_ENDIAN |
303 | union fw_self_id { |
304 | struct { |
305 | uint32_t id:2, |
306 | phy_id:6, |
307 | sequel:1, |
308 | link_active:1, |
309 | gap_count:6, |
310 | phy_speed:2, |
311 | reserved:2, |
312 | contender:1, |
313 | power_class:3, |
314 | port0:2, |
315 | port1:2, |
316 | port2:2, |
317 | initiated_reset:1, |
318 | more_packets:1; |
319 | } p0; |
320 | struct { |
321 | uint32_t |
322 | id:2, |
323 | phy_id:6, |
324 | sequel:1, |
325 | sequence_num:3, |
326 | reserved2:2, |
327 | port3:2, |
328 | port4:2, |
329 | port5:2, |
330 | port6:2, |
331 | port7:2, |
332 | port8:2, |
333 | port9:2, |
334 | port10:2, |
335 | reserved1:1, |
336 | more_packets:1; |
337 | } p1; |
338 | struct { |
339 | uint32_t |
340 | id:2, |
341 | phy_id:6, |
342 | sequel:1, |
343 | sequence_num:3, |
344 | :2, |
345 | port11:2, |
346 | port12:2, |
347 | port13:2, |
348 | port14:2, |
349 | port15:2, |
350 | :8; |
351 | } p2; |
352 | }; |
353 | #else |
354 | union fw_self_id { |
355 | struct { |
356 | uint32_t more_packets:1, |
357 | initiated_reset:1, |
358 | port2:2, |
359 | port1:2, |
360 | port0:2, |
361 | power_class:3, |
362 | contender:1, |
363 | reserved:2, |
364 | phy_speed:2, |
365 | gap_count:6, |
366 | link_active:1, |
367 | sequel:1, |
368 | phy_id:6, |
369 | id:2; |
370 | } p0; |
371 | struct { |
372 | uint32_t more_packets:1, |
373 | reserved1:1, |
374 | port10:2, |
375 | port9:2, |
376 | port8:2, |
377 | port7:2, |
378 | port6:2, |
379 | port5:2, |
380 | port4:2, |
381 | port3:2, |
382 | reserved2:2, |
383 | sequence_num:3, |
384 | sequel:1, |
385 | phy_id:6, |
386 | id:2; |
387 | } p1; |
388 | struct { |
389 | uint32_t |
390 | reserved3:8, |
391 | port15:2, |
392 | port14:2, |
393 | port13:2, |
394 | port12:2, |
395 | port11:2, |
396 | reserved4:2, |
397 | sequence_num:3, |
398 | sequel:1, |
399 | phy_id:6, |
400 | id:2; |
401 | } p2; |
402 | }; |
403 | #endif |
404 | |
405 | |
406 | struct fw_topology_map { |
407 | uint32_t crc:16, |
408 | crc_len:16; |
409 | uint32_t generation; |
410 | uint32_t self_id_count:16, |
411 | node_count:16; |
412 | union fw_self_id self_id[4*64]; |
413 | }; |
414 | |
415 | struct fw_speed_map { |
416 | uint32_t crc:16, |
417 | crc_len:16; |
418 | uint32_t generation; |
419 | uint8_t speed[64][64]; |
420 | }; |
421 | |
422 | struct fw_crom_buf { |
423 | struct fw_eui64 eui; |
424 | uint32_t len; |
425 | void *ptr; |
426 | }; |
427 | |
428 | /* |
429 | * FireWire specific system requests. |
430 | */ |
431 | #define FW_SSTBUF _IOWR('S', 86, struct fw_isobufreq) |
432 | #define FW_GSTBUF _IOWR('S', 87, struct fw_isobufreq) |
433 | #define FW_SRSTREAM _IOWR('S', 88, struct fw_isochreq) |
434 | #define FW_GRSTREAM _IOWR('S', 89, struct fw_isochreq) |
435 | #define FW_STSTREAM _IOWR('S', 90, struct fw_isochreq) |
436 | #define FW_GTSTREAM _IOWR('S', 91, struct fw_isochreq) |
437 | |
438 | #define FW_ASYREQ _IOWR('S', 92, struct fw_asyreq) |
439 | #define FW_IBUSRST _IOR('S', 1, unsigned int) |
440 | #define FW_GDEVLST _IOWR('S', 2, struct fw_devlstreq) |
441 | #define FW_SBINDADDR _IOWR('S', 3, struct fw_asybindreq) |
442 | #define FW_CBINDADDR _IOWR('S', 4, struct fw_asybindreq) |
443 | #define FW_GTPMAP _IOR('S', 5, struct fw_topology_map) |
444 | #define FW_GCROM _IOWR('S', 7, struct fw_crom_buf) |
445 | |
446 | #define FW_SDEUI64 _IOW('S', 20, struct fw_eui64) |
447 | #define FW_GDEUI64 _IOR('S', 21, struct fw_eui64) |
448 | |
449 | #define FWOHCI_RDREG _IOWR('S', 80, struct fw_reg_req_t) |
450 | #define FWOHCI_WRREG _IOWR('S', 81, struct fw_reg_req_t) |
451 | #define FWOHCI_RDPHYREG _IOWR('S', 82, struct fw_reg_req_t) |
452 | #define FWOHCI_WRPHYREG _IOWR('S', 83, struct fw_reg_req_t) |
453 | |
454 | #define DUMPDMA _IOWR('S', 82, uint32_t) |
455 | |
456 | #ifdef _KERNEL |
457 | |
458 | #define FWMAXNDMA 0x100 /* 8 bits DMA channel id. in device No. */ |
459 | |
460 | #define unit2minor(x) (((x) & 0xff) | (((x) << 12) & ~0xfffff)) |
461 | #define MAKEMINOR(f, u, s) ((f) | (((u) & 0xff) << 8) | ((s) & 0xff)) |
462 | #define DEV2UNIT(x) ((minor(x) & 0xff00) >> 8) |
463 | #define DEV2SUB(x) (minor(x) & 0xff) |
464 | #define FW_UNITMASK MAKEMINOR(0, -1, 0) |
465 | #define FW_UNIT(unit) MAKEMINOR(0, unit, 0) |
466 | |
467 | #define FWMEM_FLAG 0x10000 |
468 | #define DEV_FWMEM(x) (minor(x) & FWMEM_FLAG) |
469 | |
470 | struct fw_attach_args { |
471 | const char *name; |
472 | struct firewire_comm *fc; |
473 | struct fw_device *fwdev; |
474 | }; |
475 | |
476 | #endif |
477 | #endif /* _FIREWIRE_H_ */ |
478 | |