sl811hs.c source code [src/src/sys/dev/ic/sl811hs.c]

1	/ $NetBSD: sl811hs.c,v 1.97 2016/10/01 13:46:52 christos Exp $ /
2
3	/*
4	* Not (c) 2007 Matthew Orgass
5	* This file is public domain, meaning anyone can make any use of part or all
6	* of this file including copying into other works without credit. Any use,
7	* modified or not, is solely the responsibility of the user. If this file is
8	* part of a collection then use in the collection is governed by the terms of
9	* the collection.
10	*/
11
12	/*
13	* Cypress/ScanLogic SL811HS/T USB Host Controller
14	* Datasheet, Errata, and App Note available at www.cypress.com
15	*
16	* Uses: Ratoc CFU1U PCMCIA USB Host Controller, Nereid X68k USB HC, ISA
17	* HCs. The Ratoc CFU2 uses a different chip.
18	*
19	* This chip puts the serial in USB. It implements USB by means of an eight
20	* bit I/O interface. It can be used for ISA, PCMCIA/CF, parallel port,
21	* serial port, or any eight bit interface. It has 256 bytes of memory, the
22	* first 16 of which are used for register access. There are two sets of
23	* registers for sending individual bus transactions. Because USB is polled,
24	* this organization means that some amount of card access must often be made
25	* when devices are attached, even if when they are not directly being used.
26	* A per-ms frame interrupt is necessary and many devices will poll with a
27	* per-frame bulk transfer.
28	*
29	* It is possible to write a little over two bytes to the chip (auto
30	* incremented) per full speed byte time on the USB. Unfortunately,
31	* auto-increment does not work reliably so write and bus speed is
32	* approximately the same for full speed devices.
33	*
34	* In addition to the 240 byte packet size limit for isochronous transfers,
35	* this chip has no means of determining the current frame number other than
36	* getting all 1ms SOF interrupts, which is not always possible even on a fast
37	* system. Isochronous transfers guarantee that transfers will never be
38	* retried in a later frame, so this can cause problems with devices beyond
39	* the difficulty in actually performing the transfer most frames. I tried
40	* implementing isoc transfers and was able to play CD-derrived audio via an
41	* iMic on a 2GHz PC, however it would still be interrupted at times and
42	* once interrupted, would stay out of sync. All isoc support has been
43	* removed.
44	*
45	* BUGS: all chip revisions have problems with low speed devices through hubs.
46	* The chip stops generating SOF with hubs that send SE0 during SOF. See
47	* comment in dointr(). All performance enhancing features of this chip seem
48	* not to work properly, most confirmed buggy in errata doc.
49	*
50	*/
51
52	/*
53	* The hard interrupt is the main entry point. Start, callbacks, and repeat
54	* are the only others called frequently.
55	*
56	* Since this driver attaches to pcmcia, card removal at any point should be
57	* expected and not cause panics or infinite loops.
58	*/
59
60	/*
61	* XXX TODO:
62	* copy next output packet while transfering
63	* usb suspend
64	* could keep track of known values of all buffer space?
65	* combined print/log function for errors
66	*
67	* ub_usepolling support is untested and may not work
68	*/
69
70	#include <sys/cdefs.h>
71	__KERNEL_RCSID(`0`, "$NetBSD: sl811hs.c,v 1.97 2016/10/01 13:46:52 christos Exp $");
72
73	#ifdef _KERNEL_OPT
74	#include "opt_slhci.h"
75	#include "opt_usb.h"
76	#endif
77
78	#include <sys/param.h>
79
80	#include <sys/bus.h>
81	#include <sys/cpu.h>
82	#include <sys/device.h>
83	#include <sys/gcq.h>
84	#include <sys/intr.h>
85	#include <sys/kernel.h>
86	#include <sys/kmem.h>
87	#include <sys/proc.h>
88	#include <sys/queue.h>
89	#include <sys/sysctl.h>
90	#include <sys/systm.h>
91
92	#include <dev/usb/usb.h>
93	#include <dev/usb/usbdi.h>
94	#include <dev/usb/usbdivar.h>
95	#include <dev/usb/usbhist.h>
96	#include <dev/usb/usb_mem.h>
97	#include <dev/usb/usbdevs.h>
98	#include <dev/usb/usbroothub.h>
99
100	#include <dev/ic/sl811hsreg.h>
101	#include <dev/ic/sl811hsvar.h>
102
103	#define Q_CB 0 /* Control/Bulk */
104	#define Q_NEXT_CB 1
105	#define Q_MAX_XFER Q_CB
106	#define Q_CALLBACKS 2
107	#define Q_MAX Q_CALLBACKS
108
109	#define F_AREADY (0x00000001)
110	#define F_BREADY (0x00000002)
111	#define F_AINPROG (0x00000004)
112	#define F_BINPROG (0x00000008)
113	#define F_LOWSPEED (0x00000010)
114	#define F_UDISABLED (0x00000020) /* Consider disabled for USB */
115	#define F_NODEV (0x00000040)
116	#define F_ROOTINTR (0x00000080)
117	#define F_REALPOWER (0x00000100) /* Actual power state */
118	#define F_POWER (0x00000200) /* USB reported power state */
119	#define F_ACTIVE (0x00000400)
120	#define F_CALLBACK (0x00000800) /* Callback scheduled */
121	#define F_SOFCHECK1 (0x00001000)
122	#define F_SOFCHECK2 (0x00002000)
123	#define F_CRESET (0x00004000) /* Reset done not reported */
124	#define F_CCONNECT (0x00008000) /* Connect change not reported */
125	#define F_RESET (0x00010000)
126	#define F_ISOC_WARNED (0x00020000)
127	#define F_LSVH_WARNED (0x00040000)
128
129	#define F_DISABLED (F_NODEV\|F_UDISABLED)
130	#define F_CHANGE (F_CRESET\|F_CCONNECT)
131
132	#ifdef SLHCI_TRY_LSVH
133	unsigned int slhci_try_lsvh = `1`;
134	#else
135	unsigned int slhci_try_lsvh = `0`;
136	#endif
137
138	#define ADR 0
139	#define LEN 1
140	#define PID 2
141	#define DEV 3
142	#define STAT 2
143	#define CONT 3
144
145	#define A 0
146	#define B 1
147
148	static const uint8_t slhci_tregs[`2`][`4`] =
149	{{SL11_E0ADDR, SL11_E0LEN, SL11_E0PID, SL11_E0DEV },
150	{SL11_E1ADDR, SL11_E1LEN, SL11_E1PID, SL11_E1DEV }};
151
152	#define PT_ROOT_CTRL 0
153	#define PT_ROOT_INTR 1
154	#define PT_CTRL_SETUP 2
155	#define PT_CTRL_DATA 3
156	#define PT_CTRL_STATUS 4
157	#define PT_INTR 5
158	#define PT_BULK 6
159	#define PT_MAX 6
160
161	#ifdef SLHCI_DEBUG
162	#define SLHCI_MEM_ACCOUNTING
163	#endif
164
165	/*
166	* Maximum allowable reserved bus time. Since intr/isoc transfers have
167	* unconditional priority, this is all that ensures control and bulk transfers
168	* get a chance. It is a single value for all frames since all transfers can
169	* use multiple consecutive frames if an error is encountered. Note that it
170	* is not really possible to fill the bus with transfers, so this value should
171	* be on the low side. Defaults to giving a warning unless SLHCI_NO_OVERTIME
172	* is defined. Full time is 12000 - END_BUSTIME.
173	*/
174	#ifndef SLHCI_RESERVED_BUSTIME
175	#define SLHCI_RESERVED_BUSTIME 5000
176	#endif
177
178	/*
179	* Rate for "exceeds reserved bus time" warnings (default) or errors.
180	* Warnings only happen when an endpoint open causes the time to go above
181	* SLHCI_RESERVED_BUSTIME, not if it is already above.
182	*/
183	#ifndef SLHCI_OVERTIME_WARNING_RATE
184	#define SLHCI_OVERTIME_WARNING_RATE { 60, 0 } /* 60 seconds */
185	#endif
186	static const struct timeval reserved_warn_rate = SLHCI_OVERTIME_WARNING_RATE;
187
188	/*
189	* For EOF, the spec says 42 bit times, plus (I think) a possible hub skew of
190	* 20 bit times. By default leave 66 bit times to start the transfer beyond
191	* the required time. Units are full-speed bit times (a bit over 5us per 64).
192	* Only multiples of 64 are significant.
193	*/
194	#define SLHCI_STANDARD_END_BUSTIME 128
195	#ifndef SLHCI_EXTRA_END_BUSTIME
196	#define SLHCI_EXTRA_END_BUSTIME 0
197	#endif
198
199	#define SLHCI_END_BUSTIME (SLHCI_STANDARD_END_BUSTIME+SLHCI_EXTRA_END_BUSTIME)
200
201	/*
202	* This is an approximation of the USB worst-case timings presented on p. 54 of
203	* the USB 1.1 spec translated to full speed bit times.
204	* FS = full speed with handshake, FSII = isoc in, FSIO = isoc out,
205	* FSI = isoc (worst case), LS = low speed
206	*/
207	#define SLHCI_FS_CONST 114
208	#define SLHCI_FSII_CONST 92
209	#define SLHCI_FSIO_CONST 80
210	#define SLHCI_FSI_CONST 92
211	#define SLHCI_LS_CONST 804
212	#ifndef SLHCI_PRECICE_BUSTIME
213	/*
214	* These values are < 3% too high (compared to the multiply and divide) for
215	* max sized packets.
216	*/
217	#define SLHCI_FS_DATA_TIME(len) (((u_int)(len)<<3)+(len)+((len)>>1))
218	#define SLHCI_LS_DATA_TIME(len) (((u_int)(len)<<6)+((u_int)(len)<<4))
219	#else
220	#define SLHCI_FS_DATA_TIME(len) (56*(len)/6)
221	#define SLHCI_LS_DATA_TIME(len) (449*(len)/6)
222	#endif
223
224	/*
225	* Set SLHCI_WAIT_SIZE to the desired maximum size of single FS transfer
226	* to poll for after starting a transfer. 64 gets all full speed transfers.
227	* Note that even if 0 polling will occur if data equal or greater than the
228	* transfer size is copied to the chip while the transfer is in progress.
229	* Setting SLHCI_WAIT_TIME to -12000 will disable polling.
230	*/
231	#ifndef SLHCI_WAIT_SIZE
232	#define SLHCI_WAIT_SIZE 8
233	#endif
234	#ifndef SLHCI_WAIT_TIME
235	#define SLHCI_WAIT_TIME (SLHCI_FS_CONST + \
236	SLHCI_FS_DATA_TIME(SLHCI_WAIT_SIZE))
237	#endif
238	const int slhci_wait_time = SLHCI_WAIT_TIME;
239
240	#ifndef SLHCI_MAX_RETRIES
241	#define SLHCI_MAX_RETRIES 3
242	#endif
243
244	/ Check IER values for corruption after this many unrecognized interrupts. /
245	#ifndef SLHCI_IER_CHECK_FREQUENCY
246	#ifdef SLHCI_DEBUG
247	#define SLHCI_IER_CHECK_FREQUENCY 1
248	#else
249	#define SLHCI_IER_CHECK_FREQUENCY 100
250	#endif
251	#endif
252
253	/ Note that buffer points to the start of the buffer for this transfer. /
254	struct slhci_pipe {
255	struct usbd_pipe pipe;
256	struct usbd_xfer xfer; /* xfer in progress /
257	uint8_t buffer; /* I/O buffer (if needed) /
258	struct gcq ap; / All pipes /
259	struct gcq to; / Timeout list /
260	struct gcq xq; / Xfer queues /
261	unsigned int pflags; / Pipe flags /
262	#define PF_GONE (0x01) /* Pipe is on disabled device */
263	#define PF_TOGGLE (0x02) /* Data toggle status */
264	#define PF_LS (0x04) /* Pipe is low speed */
265	#define PF_PREAMBLE (0x08) /* Needs preamble */
266	Frame to_frame; / Frame number for timeout /
267	Frame frame; / Frame number for intr xfer /
268	Frame lastframe; / Previous frame number for intr /
269	uint16_t bustime; / Worst case bus time usage /
270	uint16_t newbustime[`2`]; / new bustimes (see index below) /
271	uint8_t tregs[`4`]; / ADR, LEN, PID, DEV /
272	uint8_t newlen[`2`]; / 0 = short data, 1 = ctrl data /
273	uint8_t newpid; / for ctrl /
274	uint8_t wantshort; / last xfer must be short /
275	uint8_t control; / Host control register settings /
276	uint8_t nerrs; / Current number of errors /
277	uint8_t ptype; / Pipe type /
278	};
279
280	#define SLHCI_BUS2SC(bus) ((bus)->ub_hcpriv)
281	#define SLHCI_PIPE2SC(pipe) SLHCI_BUS2SC((pipe)->up_dev->ud_bus)
282	#define SLHCI_XFER2SC(xfer) SLHCI_BUS2SC((xfer)->ux_bus)
283
284	#define SLHCI_PIPE2SPIPE(pipe) ((struct slhci_pipe *)(pipe))
285	#define SLHCI_XFER2SPIPE(xfer) SLHCI_PIPE2SPIPE((xfer)->ux_pipe)
286
287	#define SLHCI_XFER_TYPE(x) (SLHCI_XFER2SPIPE(xfer)->ptype)
288
289	#ifdef SLHCI_PROFILE_TRANSFER
290	#if defined(__mips__)
291	/*
292	* MIPS cycle counter does not directly count cpu cycles but is a different
293	* fraction of cpu cycles depending on the cpu.
294	*/
295	typedef uint32_t cc_type;
296	#define CC_TYPE_FMT "%u"
297	#define slhci_cc_set(x) __asm volatile ("mfc0 %[cc], $9\n\tnop\n\tnop\n\tnop" \
298	: [cc] "=r"(x))
299	#elif defined(__i386__)
300	typedef uint64_t cc_type;
301	#define CC_TYPE_FMT "%llu"
302	#define slhci_cc_set(x) __asm volatile ("rdtsc" : "=A"(x))
303	#else
304	#error "SLHCI_PROFILE_TRANSFER not implemented on this MACHINE_ARCH (see sys/dev/ic/sl811hs.c)"
305	#endif
306	struct slhci_cc_time {
307	cc_type start;
308	cc_type stop;
309	unsigned int miscdata;
310	};
311	#ifndef SLHCI_N_TIMES
312	#define SLHCI_N_TIMES 200
313	#endif
314	struct slhci_cc_times {
315	struct slhci_cc_time times[SLHCI_N_TIMES];
316	int current;
317	int wraparound;
318	};
319
320	static struct slhci_cc_times t_ab[`2`];
321	static struct slhci_cc_times t_abdone;
322	static struct slhci_cc_times t_copy_to_dev;
323	static struct slhci_cc_times t_copy_from_dev;
324	static struct slhci_cc_times t_intr;
325	static struct slhci_cc_times t_lock;
326	static struct slhci_cc_times t_delay;
327	static struct slhci_cc_times t_hard_int;
328	static struct slhci_cc_times t_callback;
329
330	static inline void
331	start_cc_time(struct slhci_cc_times times, unsigned* int misc) {
332	times->times[times->current].miscdata = misc;
333	slhci_cc_set(times->times[times->current].start);
334	}
335	static inline void
336	stop_cc_time(struct slhci_cc_times *times) {
337	slhci_cc_set(times->times[times->current].stop);
338	if (++times->current >= SLHCI_N_TIMES) {
339	times->current = `0`;
340	times->wraparound = `1`;
341	}
342	}
343
344	void slhci_dump_cc_times(int);
345
346	void
347	slhci_dump_cc_times(int n) {
348	struct slhci_cc_times *times;
349	int i;
350
351	switch (n) {
352	default:
353	case `0`:
354	printf("USBA start transfer to intr:\n");
355	times = &t_ab[A];
356	break;
357	case `1`:
358	printf("USBB start transfer to intr:\n");
359	times = &t_ab[B];
360	break;
361	case `2`:
362	printf("abdone:\n");
363	times = &t_abdone;
364	break;
365	case `3`:
366	printf("copy to device:\n");
367	times = &t_copy_to_dev;
368	break;
369	case `4`:
370	printf("copy from device:\n");
371	times = &t_copy_from_dev;
372	break;
373	case `5`:
374	printf("intr to intr:\n");
375	times = &t_intr;
376	break;
377	case `6`:
378	printf("lock to release:\n");
379	times = &t_lock;
380	break;
381	case `7`:
382	printf("delay time:\n");
383	times = &t_delay;
384	break;
385	case `8`:
386	printf("hard interrupt enter to exit:\n");
387	times = &t_hard_int;
388	break;
389	case `9`:
390	printf("callback:\n");
391	times = &t_callback;
392	break;
393	}
394
395	if (times->wraparound)
396	for (i = times->current + `1`; i < SLHCI_N_TIMES; i++)
397	printf("start " CC_TYPE_FMT " stop " CC_TYPE_FMT
398	" difference %8i miscdata %#x\n",
399	times->times[i].start, times->times[i].stop,
400	(int)(times->times[i].stop -
401	times->times[i].start), times->times[i].miscdata);
402
403	for (i = `0`; i < times->current; i++)
404	printf("start " CC_TYPE_FMT " stop " CC_TYPE_FMT
405	" difference %8i miscdata %#x\n", times->times[i].start,
406	times->times[i].stop, (int)(times->times[i].stop -
407	times->times[i].start), times->times[i].miscdata);
408	}
409	#else
410	#define start_cc_time(x, y)
411	#define stop_cc_time(x)
412	#endif /* SLHCI_PROFILE_TRANSFER */
413
414	typedef usbd_status (LockCallFunc)(struct* slhci_softc , struct* slhci_pipe
415	, struct* usbd_xfer *);
416
417	struct usbd_xfer * slhci_allocx(struct usbd_bus , unsigned* int);
418	void slhci_freex(struct usbd_bus , struct* usbd_xfer *);
419	static void slhci_get_lock(struct usbd_bus , kmutex_t *);
420
421	usbd_status slhci_transfer(struct usbd_xfer *);
422	usbd_status slhci_start(struct usbd_xfer *);
423	usbd_status slhci_root_start(struct usbd_xfer *);
424	usbd_status slhci_open(struct usbd_pipe *);
425
426	static int slhci_roothub_ctrl(struct usbd_bus , usb_device_request_t ,
427	void , int*);
428
429	/*
430	* slhci_supported_rev, slhci_preinit, slhci_attach, slhci_detach,
431	* slhci_activate
432	*/
433
434	void slhci_abort(struct usbd_xfer *);
435	void slhci_close(struct usbd_pipe *);
436	void slhci_clear_toggle(struct usbd_pipe *);
437	void slhci_poll(struct usbd_bus *);
438	void slhci_done(struct usbd_xfer *);
439	void slhci_void(void *);
440
441	/ lock entry functions /
442
443	#ifdef SLHCI_MEM_ACCOUNTING
444	void slhci_mem_use(struct usbd_bus , int*);
445	#endif
446
447	void slhci_reset_entry(void *);
448	usbd_status slhci_lock_call(struct slhci_softc *, LockCallFunc,
449	struct slhci_pipe , struct* usbd_xfer *);
450	void slhci_start_entry(struct slhci_softc , struct* slhci_pipe *);
451	void slhci_callback_entry(void *arg);
452	void slhci_do_callback(struct slhci_softc , struct* usbd_xfer *);
453
454	/ slhci_intr /
455
456	void slhci_main(struct slhci_softc *);
457
458	/ in lock functions /
459
460	static void slhci_write(struct slhci_softc *, uint8_t, uint8_t);
461	static uint8_t slhci_read(struct slhci_softc *, uint8_t);
462	static void slhci_write_multi(struct slhci_softc , uint8_t, uint8_t , int);
463	static void slhci_read_multi(struct slhci_softc , uint8_t, uint8_t , int);
464
465	static void slhci_waitintr(struct slhci_softc , int*);
466	static int slhci_dointr(struct slhci_softc *);
467	static void slhci_abdone(struct slhci_softc , int*);
468	static void slhci_tstart(struct slhci_softc *);
469	static void slhci_dotransfer(struct slhci_softc *);
470
471	static void slhci_callback(struct slhci_softc *);
472	static void slhci_enter_xfer(struct slhci_softc , struct* slhci_pipe *);
473	static void slhci_enter_xfers(struct slhci_softc *);
474	static void slhci_queue_timed(struct slhci_softc , struct* slhci_pipe *);
475	static void slhci_xfer_timer(struct slhci_softc , struct* slhci_pipe *);
476
477	static void slhci_callback_schedule(struct slhci_softc *);
478	static void slhci_do_callback_schedule(struct slhci_softc *);
479	#if 0
480	void slhci_pollxfer(struct slhci_softc , struct* usbd_xfer ); /* XXX /
481	#endif
482
483	static usbd_status slhci_do_poll(struct slhci_softc , struct* slhci_pipe *,
484	struct usbd_xfer *);
485	static usbd_status slhci_lsvh_warn(struct slhci_softc , struct* slhci_pipe *,
486	struct usbd_xfer *);
487	static usbd_status slhci_isoc_warn(struct slhci_softc , struct* slhci_pipe *,
488	struct usbd_xfer *);
489	static usbd_status slhci_open_pipe(struct slhci_softc , struct* slhci_pipe *,
490	struct usbd_xfer *);
491	static usbd_status slhci_close_pipe(struct slhci_softc , struct* slhci_pipe *,
492	struct usbd_xfer *);
493	static usbd_status slhci_do_abort(struct slhci_softc , struct* slhci_pipe *,
494	struct usbd_xfer *);
495	static usbd_status slhci_halt(struct slhci_softc , struct* slhci_pipe *,
496	struct usbd_xfer *);
497
498	static void slhci_intrchange(struct slhci_softc *, uint8_t);
499	static void slhci_drain(struct slhci_softc *);
500	static void slhci_reset(struct slhci_softc *);
501	static int slhci_reserve_bustime(struct slhci_softc , struct* slhci_pipe *,
502	int);
503	static void slhci_insert(struct slhci_softc *);
504
505	static usbd_status slhci_clear_feature(struct slhci_softc , unsigned* int);
506	static usbd_status slhci_set_feature(struct slhci_softc , unsigned* int);
507	static void slhci_get_status(struct slhci_softc , usb_port_status_t );
508
509	#define SLHCIHIST_FUNC() USBHIST_FUNC()
510	#define SLHCIHIST_CALLED() USBHIST_CALLED(slhcidebug)
511
512	#ifdef SLHCI_DEBUG
513	static int slhci_memtest(struct slhci_softc *);
514
515	void slhci_log_buffer(struct usbd_xfer *);
516	void slhci_log_req(usb_device_request_t *);
517	void slhci_log_dumpreg(void);
518	void slhci_log_xfer(struct usbd_xfer *);
519	void slhci_log_spipe(struct slhci_pipe *);
520	void slhci_print_intr(void);
521	void slhci_log_sc(void);
522	void slhci_log_slreq(struct slhci_pipe *);
523
524	/ Constified so you can read the values from ddb /
525	const int SLHCI_D_TRACE = `0x0001`;
526	const int SLHCI_D_MSG = `0x0002`;
527	const int SLHCI_D_XFER = `0x0004`;
528	const int SLHCI_D_MEM = `0x0008`;
529	const int SLHCI_D_INTR = `0x0010`;
530	const int SLHCI_D_SXFER = `0x0020`;
531	const int SLHCI_D_ERR = `0x0080`;
532	const int SLHCI_D_BUF = `0x0100`;
533	const int SLHCI_D_SOFT = `0x0200`;
534	const int SLHCI_D_WAIT = `0x0400`;
535	const int SLHCI_D_ROOT = `0x0800`;
536	/ SOF/NAK alone normally ignored, SOF also needs D_INTR /
537	const int SLHCI_D_SOF = `0x1000`;
538	const int SLHCI_D_NAK = `0x2000`;
539
540	int slhcidebug = `0x1cbc`; / 0xc8c; / / 0xffff; / / 0xd8c; /
541
542	SYSCTL_SETUP(sysctl_hw_slhci_setup, "sysctl hw.slhci setup")
543	{
544	int err;
545	const struct sysctlnode *rnode;
546	const struct sysctlnode *cnode;
547
548	err = sysctl_createv(clog, `0`, NULL, &rnode,
549	CTLFLAG_PERMANENT, CTLTYPE_NODE, "slhci",
550	SYSCTL_DESCR("slhci global controls"),
551	NULL, `0`, NULL, `0`, CTL_HW, CTL_CREATE, CTL_EOL);
552
553	if (err)
554	goto fail;
555
556	/ control debugging printfs /
557	err = sysctl_createv(clog, `0`, &rnode, &cnode,
558	CTLFLAG_PERMANENT\|CTLFLAG_READWRITE, CTLTYPE_INT,
559	"debug", SYSCTL_DESCR("Enable debugging output"),
560	NULL, `0`, &slhcidebug, sizeof(slhcidebug), CTL_CREATE, CTL_EOL);
561	if (err)
562	goto fail;
563
564	return;
565	fail:
566	aprint_error("%s: sysctl_createv failed (err = %d)\n", __func__, err);
567	}
568
569	struct slhci_softc *ssc;
570
571	#define SLHCI_DEXEC(x, y) do { if ((slhcidebug & SLHCI_ ## x)) { y; } \
572	} while (/CONSTCOND/ 0)
573	#define DDOLOG(f, a, b, c, d) do { KERNHIST_LOG(usbhist, f, a, b, c, d); \
574	} while (/CONSTCOND/0)
575	#define DLOG(x, f, a, b, c, d) SLHCI_DEXEC(x, DDOLOG(f, a, b, c, d))
576
577	/*
578	* DDOLOGBUF logs a buffer up to 8 bytes at a time. No identifier so that we
579	* can make it a real function.
580	*/
581	static void
582	DDOLOGBUF(uint8_t buf, unsigned* int length)
583	{
584	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
585	int i;
586
587	for(i=`0`; i+`8` <= length; i+=`8`)
588	DDOLOG("%.4x %.4x %.4x %.4x", (buf[i] << `8`) \| buf[i+`1`],
589	(buf[i+`2`] << `8`) \| buf[i+`3`], (buf[i+`4`] << `8`) \| buf[i+`5`],
590	(buf[i+`6`] << `8`) \| buf[i+`7`]);
591	if (length == i+`7`)
592	DDOLOG("%.4x %.4x %.4x %.2x", (buf[i] << `8`) \| buf[i+`1`],
593	(buf[i+`2`] << `8`) \| buf[i+`3`], (buf[i+`4`] << `8`) \| buf[i+`5`],
594	buf[i+`6`]);
595	else if (length == i+`6`)
596	DDOLOG("%.4x %.4x %.4x", (buf[i] << `8`) \| buf[i+`1`],
597	(buf[i+`2`] << `8`) \| buf[i+`3`], (buf[i+`4`] << `8`) \| buf[i+`5`], `0`);
598	else if (length == i+`5`)
599	DDOLOG("%.4x %.4x %.2x", (buf[i] << `8`) \| buf[i+`1`],
600	(buf[i+`2`] << `8`) \| buf[i+`3`], buf[i+`4`], `0`);
601	else if (length == i+`4`)
602	DDOLOG("%.4x %.4x", (buf[i] << `8`) \| buf[i+`1`],
603	(buf[i+`2`] << `8`) \| buf[i+`3`], `0`,`0`);
604	else if (length == i+`3`)
605	DDOLOG("%.4x %.2x", (buf[i] << `8`) \| buf[i+`1`], buf[i+`2`], `0`,`0`);
606	else if (length == i+`2`)
607	DDOLOG("%.4x", (buf[i] << `8`) \| buf[i+`1`], `0`,`0`,`0`);
608	else if (length == i+`1`)
609	DDOLOG("%.2x", buf[i], `0`,`0`,`0`);
610	}
611	#define DLOGBUF(x, b, l) SLHCI_DEXEC(x, DDOLOGBUF(b, l))
612
613	#define DDOLOGCTRL(x) do { \
614	DDOLOG("CTRL suspend=%d", !!((x) & SL11_CTRL_SUSPEND), 0, 0, 0); \
615	DDOLOG("CTRL ls =%d jk =%d reset =%d sof =%d", \
616	!!((x) & SL11_CTRL_LOWSPEED), !!((x) & SL11_CTRL_JKSTATE), \
617	!!((x) & SL11_CTRL_RESETENGINE), !!((x) & SL11_CTRL_ENABLESOF));\
618	} while (0)
619
620	#define DDOLOGISR(r) do { \
621	DDOLOG("ISR data =%d det/res=%d insert =%d sof =%d", \
622	!!((r) & SL11_ISR_DATA), !!((r) & SL11_ISR_RESUME), \
623	!!((r) & SL11_ISR_INSERT), !!!!((r) & SL11_ISR_SOF)); \
624	DDOLOG("ISR babble =%d usbb =%d usba =%d", \
625	!!((r) & SL11_ISR_BABBLE), !!((r) & SL11_ISR_USBB), \
626	!!((r) & SL11_ISR_USBA), 0); \
627	} while (0)
628
629	#define DDOLOGIER(r) do { \
630	DDOLOG("IER det/res=%d insert =%d sof =%d", \
631	!!((r) & SL11_IER_RESUME), \
632	!!((r) & SL11_IER_INSERT), !!!!((r) & SL11_IER_SOF), 0); \
633	DDOLOG("IER babble =%d usbb =%d usba =%d", \
634	!!((r) & SL11_IER_BABBLE), !!((r) & SL11_IER_USBB), \
635	!!((r) & SL11_IER_USBA), 0); \
636	} while (0)
637
638	#define DDOLOGSTATUS(s) do { \
639	DDOLOG("STAT stall =%d nak =%d overflow =%d setup =%d", \
640	!!((s) & SL11_EPSTAT_STALL), !!((s) & SL11_EPSTAT_NAK), \
641	!!((s) & SL11_EPSTAT_OVERFLOW), !!((s) & SL11_EPSTAT_SETUP)); \
642	DDOLOG("STAT sequence=%d timeout =%d error =%d ack =%d", \
643	!!((s) & SL11_EPSTAT_SEQUENCE), !!((s) & SL11_EPSTAT_TIMEOUT), \
644	!!((s) & SL11_EPSTAT_ERROR), !!((s) & SL11_EPSTAT_ACK)); \
645	} while (0)
646
647	#define DDOLOGEPCTRL(r) do { \
648	DDOLOG("CTRL preamble=%d toggle =%d sof =%d iso =%d", \
649	!!((r) & SL11_EPCTRL_PREAMBLE), !!((r) & SL11_EPCTRL_DATATOGGLE),\
650	!!((r) & SL11_EPCTRL_SOF), !!((r) & SL11_EPCTRL_ISO)); \
651	DDOLOG("CTRL out =%d enable =%d arm =%d", \
652	!!((r) & SL11_EPCTRL_DIRECTION), \
653	!!((r) & SL11_EPCTRL_ENABLE), !!((r) & SL11_EPCTRL_ARM), 0); \
654	} while (0)
655
656	#define DDOLOGEPSTAT(r) do { \
657	DDOLOG("STAT stall =%d nak =%d overflow =%d setup =%d", \
658	!!((r) & SL11_EPSTAT_STALL), !!((r) & SL11_EPSTAT_NAK), \
659	!!((r) & SL11_EPSTAT_OVERFLOW), !!((r) & SL11_EPSTAT_SETUP)); \
660	DDOLOG("STAT sequence=%d timeout =%d error =%d ack =%d", \
661	!!((r) & SL11_EPSTAT_SEQUENCE), !!((r) & SL11_EPSTAT_TIMEOUT), \
662	!!((r) & SL11_EPSTAT_ERROR), !!((r) & SL11_EPSTAT_ACK)); \
663	} while (0)
664	#else /* now !SLHCI_DEBUG */
665	#define slhcidebug 0
666	#define slhci_log_spipe(spipe) ((void)0)
667	#define slhci_log_xfer(xfer) ((void)0)
668	#define SLHCI_DEXEC(x, y) ((void)0)
669	#define DDOLOG(f, a, b, c, d) ((void)0)
670	#define DLOG(x, f, a, b, c, d) ((void)0)
671	#define DDOLOGBUF(b, l) ((void)0)
672	#define DLOGBUF(x, b, l) ((void)0)
673	#define DDOLOGCTRL(x) ((void)0)
674	#define DDOLOGISR(r) ((void)0)
675	#define DDOLOGIER(r) ((void)0)
676	#define DDOLOGSTATUS(s) ((void)0)
677	#define DDOLOGEPCTRL(r) ((void)0)
678	#define DDOLOGEPSTAT(r) ((void)0)
679	#endif /* SLHCI_DEBUG */
680
681	#ifdef DIAGNOSTIC
682	#define LK_SLASSERT(exp, sc, spipe, xfer, ext) do { \
683	if (!(exp)) { \
684	printf("%s: assertion %s failed line %u function %s!" \
685	" halted\n", SC_NAME(sc), #exp, __LINE__, __func__);\
686	slhci_halt(sc, spipe, xfer); \
687	ext; \
688	} \
689	} while (/CONSTCOND/0)
690	#define UL_SLASSERT(exp, sc, spipe, xfer, ext) do { \
691	if (!(exp)) { \
692	printf("%s: assertion %s failed line %u function %s!" \
693	" halted\n", SC_NAME(sc), #exp, __LINE__, __func__); \
694	slhci_lock_call(sc, &slhci_halt, spipe, xfer); \
695	ext; \
696	} \
697	} while (/CONSTCOND/0)
698	#else
699	#define LK_SLASSERT(exp, sc, spipe, xfer, ext) ((void)0)
700	#define UL_SLASSERT(exp, sc, spipe, xfer, ext) ((void)0)
701	#endif
702
703	const struct usbd_bus_methods slhci_bus_methods = {
704	.ubm_open = slhci_open,
705	.ubm_softint= slhci_void,
706	.ubm_dopoll = slhci_poll,
707	.ubm_allocx = slhci_allocx,
708	.ubm_freex = slhci_freex,
709	.ubm_getlock = slhci_get_lock,
710	.ubm_rhctrl = slhci_roothub_ctrl,
711	};
712
713	const struct usbd_pipe_methods slhci_pipe_methods = {
714	.upm_transfer = slhci_transfer,
715	.upm_start = slhci_start,
716	.upm_abort = slhci_abort,
717	.upm_close = slhci_close,
718	.upm_cleartoggle = slhci_clear_toggle,
719	.upm_done = slhci_done,
720	};
721
722	const struct usbd_pipe_methods slhci_root_methods = {
723	.upm_transfer = slhci_transfer,
724	.upm_start = slhci_root_start,
725	.upm_abort = slhci_abort,
726	.upm_close = (void ()(struct* usbd_pipe ))slhci_void, /* XXX safe? /
727	.upm_cleartoggle = slhci_clear_toggle,
728	.upm_done = slhci_done,
729	};
730
731	/ Queue inlines /
732
733	#define GOT_FIRST_TO(tvar, t) \
734	GCQ_GOT_FIRST_TYPED(tvar, &(t)->to, struct slhci_pipe, to)
735
736	#define FIND_TO(var, t, tvar, cond) \
737	GCQ_FIND_TYPED(var, &(t)->to, tvar, struct slhci_pipe, to, cond)
738
739	#define FOREACH_AP(var, t, tvar) \
740	GCQ_FOREACH_TYPED(var, &(t)->ap, tvar, struct slhci_pipe, ap)
741
742	#define GOT_FIRST_TIMED_COND(tvar, t, cond) \
743	GCQ_GOT_FIRST_COND_TYPED(tvar, &(t)->timed, struct slhci_pipe, xq, cond)
744
745	#define GOT_FIRST_CB(tvar, t) \
746	GCQ_GOT_FIRST_TYPED(tvar, &(t)->q[Q_CB], struct slhci_pipe, xq)
747
748	#define DEQUEUED_CALLBACK(tvar, t) \
749	GCQ_DEQUEUED_FIRST_TYPED(tvar, &(t)->q[Q_CALLBACKS], struct slhci_pipe, xq)
750
751	#define FIND_TIMED(var, t, tvar, cond) \
752	GCQ_FIND_TYPED(var, &(t)->timed, tvar, struct slhci_pipe, xq, cond)
753
754	#define DEQUEUED_WAITQ(tvar, sc) \
755	GCQ_DEQUEUED_FIRST_TYPED(tvar, &(sc)->sc_waitq, struct slhci_pipe, xq)
756
757	static inline void
758	enter_waitq(struct slhci_softc sc, struct* slhci_pipe *spipe)
759	{
760	gcq_insert_tail(&sc->sc_waitq, &spipe->xq);
761	}
762
763	static inline void
764	enter_q(struct slhci_transfers t, struct* slhci_pipe spipe, int* i)
765	{
766	gcq_insert_tail(&t->q[i], &spipe->xq);
767	}
768
769	static inline void
770	enter_callback(struct slhci_transfers t, struct* slhci_pipe *spipe)
771	{
772	gcq_insert_tail(&t->q[Q_CALLBACKS], &spipe->xq);
773	}
774
775	static inline void
776	enter_all_pipes(struct slhci_transfers t, struct* slhci_pipe *spipe)
777	{
778	gcq_insert_tail(&t->ap, &spipe->ap);
779	}
780
781	/ Start out of lock functions. /
782
783	struct usbd_xfer *
784	slhci_allocx(struct usbd_bus bus, unsigned* int nframes)
785	{
786	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
787	struct usbd_xfer *xfer;
788
789	xfer = kmem_zalloc(sizeof(*xfer), KM_SLEEP);
790
791	DLOG(D_MEM, "allocx %p", xfer, `0`,`0`,`0`);
792
793	#ifdef SLHCI_MEM_ACCOUNTING
794	slhci_mem_use(bus, `1`);
795	#endif
796	#ifdef DIAGNOSTIC
797	if (xfer != NULL)
798	xfer->ux_state = XFER_BUSY;
799	#endif
800	return xfer;
801	}
802
803	void
804	slhci_freex(struct usbd_bus bus, struct* usbd_xfer *xfer)
805	{
806	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
807	DLOG(D_MEM, "freex xfer %p spipe %p", xfer, xfer->ux_pipe,`0`,`0`);
808
809	#ifdef SLHCI_MEM_ACCOUNTING
810	slhci_mem_use(bus, -`1`);
811	#endif
812	#ifdef DIAGNOSTIC
813	if (xfer->ux_state != XFER_BUSY) {
814	struct slhci_softc *sc = SLHCI_BUS2SC(bus);
815	printf("%s: slhci_freex: xfer=%p not busy, %#08x halted\n",
816	SC_NAME(sc), xfer, xfer->ux_state);
817	DDOLOG("xfer=%p not busy, %#08x halted\n", xfer,
818	xfer->ux_state, `0`, `0`);
819	slhci_lock_call(sc, &slhci_halt, NULL, NULL);
820	return;
821	}
822	xfer->ux_state = XFER_FREE;
823	#endif
824
825	kmem_free(xfer, sizeof(*xfer));
826	}
827
828	static void
829	slhci_get_lock(struct usbd_bus bus, kmutex_t *lock)
830	{
831	struct slhci_softc *sc = SLHCI_BUS2SC(bus);
832
833	*lock = &sc->sc_lock;
834	}
835
836	usbd_status
837	slhci_transfer(struct usbd_xfer *xfer)
838	{
839	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
840	struct slhci_softc *sc = SLHCI_XFER2SC(xfer);
841	usbd_status error;
842
843	DLOG(D_TRACE, "transfer type %d xfer %p spipe %p ",
844	SLHCI_XFER_TYPE(xfer), xfer, xfer->ux_pipe, `0`);
845
846	/ Insert last in queue /
847	mutex_enter(&sc->sc_lock);
848	error = usb_insert_transfer(xfer);
849	mutex_exit(&sc->sc_lock);
850	if (error) {
851	if (error != USBD_IN_PROGRESS)
852	DLOG(D_ERR, "usb_insert_transfer returns %d!", error,
853	`0`,`0`,`0`);
854	return error;
855	}
856
857	/*
858	* Pipe isn't running (otherwise error would be USBD_INPROG),
859	* so start it first.
860	*/
861
862	/*
863	* Start will take the lock.
864	*/
865	error = xfer->ux_pipe->up_methods->upm_start(SIMPLEQ_FIRST(&xfer->ux_pipe->up_queue));
866
867	return error;
868	}
869
870	/ It is not safe for start to return anything other than USBD_INPROG. /
871	usbd_status
872	slhci_start(struct usbd_xfer *xfer)
873	{
874	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
875	struct slhci_softc *sc = SLHCI_XFER2SC(xfer);
876	struct usbd_pipe *pipe = xfer->ux_pipe;
877	struct slhci_pipe *spipe = SLHCI_PIPE2SPIPE(pipe);
878	struct slhci_transfers *t = &sc->sc_transfers;
879	usb_endpoint_descriptor_t *ed = pipe->up_endpoint->ue_edesc;
880	unsigned int max_packet;
881
882	mutex_enter(&sc->sc_lock);
883
884	max_packet = UGETW(ed->wMaxPacketSize);
885
886	DLOG(D_TRACE, "transfer type %d start xfer %p spipe %p length %d",
887	spipe->ptype, xfer, spipe, xfer->ux_length);
888
889	/ root transfers use slhci_root_start /
890
891	KASSERT(spipe->xfer == NULL); / not SLASSERT /
892
893	xfer->ux_actlen = `0`;
894	xfer->ux_status = USBD_IN_PROGRESS;
895
896	spipe->xfer = xfer;
897
898	spipe->nerrs = `0`;
899	spipe->frame = t->frame;
900	spipe->control = SL11_EPCTRL_ARM_ENABLE;
901	spipe->tregs[DEV] = pipe->up_dev->ud_addr;
902	spipe->tregs[PID] = spipe->newpid = UE_GET_ADDR(ed->bEndpointAddress)
903	\| (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN ? SL11_PID_IN :
904	SL11_PID_OUT);
905	spipe->newlen[`0`] = xfer->ux_length % max_packet;
906	spipe->newlen[`1`] = min(xfer->ux_length, max_packet);
907
908	if (spipe->ptype == PT_BULK \|\| spipe->ptype == PT_INTR) {
909	if (spipe->pflags & PF_TOGGLE)
910	spipe->control \|= SL11_EPCTRL_DATATOGGLE;
911	spipe->tregs[LEN] = spipe->newlen[`1`];
912	if (spipe->tregs[LEN])
913	spipe->buffer = xfer->ux_buf;
914	else
915	spipe->buffer = NULL;
916	spipe->lastframe = t->frame;
917	if (spipe->ptype == PT_INTR) {
918	spipe->frame = spipe->lastframe +
919	spipe->pipe.up_interval;
920	}
921
922	#if defined(DEBUG) \|\| defined(SLHCI_DEBUG)
923	if (__predict_false(spipe->ptype == PT_INTR &&
924	xfer->ux_length > spipe->tregs[LEN])) {
925	printf("%s: Long INTR transfer not supported!\n",
926	SC_NAME(sc));
927	DDOLOG("Long INTR transfer not supported!", `0`, `0`, `0`, `0`);
928	xfer->ux_status = USBD_INVAL;
929	}
930	#endif
931	} else {
932	/ ptype may be currently set to any control transfer type. /
933	SLHCI_DEXEC(D_TRACE, slhci_log_xfer(xfer));
934
935	/ SETUP contains IN/OUT bits also /
936	spipe->tregs[PID] \|= SL11_PID_SETUP;
937	spipe->tregs[LEN] = `8`;
938	spipe->buffer = (uint8_t *)&xfer->ux_request;
939	DLOGBUF(D_XFER, spipe->buffer, spipe->tregs[LEN]);
940	spipe->ptype = PT_CTRL_SETUP;
941	spipe->newpid &= ~SL11_PID_BITS;
942	if (xfer->ux_length == `0` \|\|
943	(xfer->ux_request.bmRequestType & UT_READ))
944	spipe->newpid \|= SL11_PID_IN;
945	else
946	spipe->newpid \|= SL11_PID_OUT;
947	}
948
949	if (xfer->ux_flags & USBD_FORCE_SHORT_XFER &&
950	spipe->tregs[LEN] == max_packet &&
951	(spipe->newpid & SL11_PID_BITS) == SL11_PID_OUT)
952	spipe->wantshort = `1`;
953	else
954	spipe->wantshort = `0`;
955
956	/*
957	* The goal of newbustime and newlen is to avoid bustime calculation
958	* in the interrupt. The calculations are not too complex, but they
959	* complicate the conditional logic somewhat and doing them all in the
960	* same place shares constants. Index 0 is "short length" for bulk and
961	* ctrl data and 1 is "full length" for ctrl data (bulk/intr are
962	* already set to full length).
963	*/
964	if (spipe->pflags & PF_LS) {
965	/*
966	* Setting PREAMBLE for directly connected LS devices will
967	* lock up the chip.
968	*/
969	if (spipe->pflags & PF_PREAMBLE)
970	spipe->control \|= SL11_EPCTRL_PREAMBLE;
971	if (max_packet <= `8`) {
972	spipe->bustime = SLHCI_LS_CONST +
973	SLHCI_LS_DATA_TIME(spipe->tregs[LEN]);
974	spipe->newbustime[`0`] = SLHCI_LS_CONST +
975	SLHCI_LS_DATA_TIME(spipe->newlen[`0`]);
976	spipe->newbustime[`1`] = SLHCI_LS_CONST +
977	SLHCI_LS_DATA_TIME(spipe->newlen[`1`]);
978	} else
979	xfer->ux_status = USBD_INVAL;
980	} else {
981	UL_SLASSERT(pipe->up_dev->ud_speed == USB_SPEED_FULL, sc,
982	spipe, xfer, return USBD_IN_PROGRESS);
983	if (max_packet <= SL11_MAX_PACKET_SIZE) {
984	spipe->bustime = SLHCI_FS_CONST +
985	SLHCI_FS_DATA_TIME(spipe->tregs[LEN]);
986	spipe->newbustime[`0`] = SLHCI_FS_CONST +
987	SLHCI_FS_DATA_TIME(spipe->newlen[`0`]);
988	spipe->newbustime[`1`] = SLHCI_FS_CONST +
989	SLHCI_FS_DATA_TIME(spipe->newlen[`1`]);
990	} else
991	xfer->ux_status = USBD_INVAL;
992	}
993
994	/*
995	* The datasheet incorrectly indicates that DIRECTION is for
996	* "transmit to host". It is for OUT and SETUP. The app note
997	* describes its use correctly.
998	*/
999	if ((spipe->tregs[PID] & SL11_PID_BITS) != SL11_PID_IN)
1000	spipe->control \|= SL11_EPCTRL_DIRECTION;
1001
1002	slhci_start_entry(sc, spipe);
1003
1004	mutex_exit(&sc->sc_lock);
1005
1006	return USBD_IN_PROGRESS;
1007	}
1008
1009	usbd_status
1010	slhci_root_start(struct usbd_xfer *xfer)
1011	{
1012	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1013	struct slhci_softc *sc;
1014	struct slhci_pipe *spipe __diagused;
1015
1016	spipe = SLHCI_PIPE2SPIPE(xfer->ux_pipe);
1017	sc = SLHCI_XFER2SC(xfer);
1018
1019	struct slhci_transfers *t = &sc->sc_transfers;
1020
1021	LK_SLASSERT(spipe != NULL && xfer != NULL, sc, spipe, xfer, return
1022	USBD_CANCELLED);
1023
1024	DLOG(D_TRACE, "transfer type %d start", SLHCI_XFER_TYPE(xfer), `0`, `0`, `0`);
1025
1026	KASSERT(spipe->ptype == PT_ROOT_INTR);
1027
1028	mutex_enter(&sc->sc_intr_lock);
1029	t->rootintr = xfer;
1030	mutex_exit(&sc->sc_intr_lock);
1031
1032	return USBD_IN_PROGRESS;
1033	}
1034
1035	usbd_status
1036	slhci_open(struct usbd_pipe *pipe)
1037	{
1038	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1039	struct usbd_device *dev;
1040	struct slhci_softc *sc;
1041	struct slhci_pipe *spipe;
1042	usb_endpoint_descriptor_t *ed;
1043	unsigned int max_packet, pmaxpkt;
1044	uint8_t rhaddr;
1045
1046	dev = pipe->up_dev;
1047	sc = SLHCI_PIPE2SC(pipe);
1048	spipe = SLHCI_PIPE2SPIPE(pipe);
1049	ed = pipe->up_endpoint->ue_edesc;
1050	rhaddr = dev->ud_bus->ub_rhaddr;
1051
1052	DLOG(D_TRACE, "slhci_open(addr=%d,ep=%d,rootaddr=%d)",
1053	dev->ud_addr, ed->bEndpointAddress, rhaddr, `0`);
1054
1055	spipe->pflags = `0`;
1056	spipe->frame = `0`;
1057	spipe->lastframe = `0`;
1058	spipe->xfer = NULL;
1059	spipe->buffer = NULL;
1060
1061	gcq_init(&spipe->ap);
1062	gcq_init(&spipe->to);
1063	gcq_init(&spipe->xq);
1064
1065	/*
1066	* The endpoint descriptor will not have been set up yet in the case
1067	* of the standard control pipe, so the max packet checks are also
1068	* necessary in start.
1069	*/
1070
1071	max_packet = UGETW(ed->wMaxPacketSize);
1072
1073	if (dev->ud_speed == USB_SPEED_LOW) {
1074	spipe->pflags \|= PF_LS;
1075	if (dev->ud_myhub->ud_addr != rhaddr) {
1076	spipe->pflags \|= PF_PREAMBLE;
1077	if (!slhci_try_lsvh)
1078	return slhci_lock_call(sc, &slhci_lsvh_warn,
1079	spipe, NULL);
1080	}
1081	pmaxpkt = `8`;
1082	} else
1083	pmaxpkt = SL11_MAX_PACKET_SIZE;
1084
1085	if (max_packet > pmaxpkt) {
1086	DLOG(D_ERR, "packet too large! size %d spipe %p", max_packet,
1087	spipe, `0`,`0`);
1088	return USBD_INVAL;
1089	}
1090
1091	if (dev->ud_addr == rhaddr) {
1092	switch (ed->bEndpointAddress) {
1093	case USB_CONTROL_ENDPOINT:
1094	spipe->ptype = PT_ROOT_CTRL;
1095	pipe->up_interval = `0`;
1096	pipe->up_methods = &roothub_ctrl_methods;
1097	break;
1098	case UE_DIR_IN \| USBROOTHUB_INTR_ENDPT:
1099	spipe->ptype = PT_ROOT_INTR;
1100	pipe->up_interval = `1`;
1101	pipe->up_methods = &slhci_root_methods;
1102	break;
1103	default:
1104	printf("%s: Invalid root endpoint!\n", SC_NAME(sc));
1105	DDOLOG("Invalid root endpoint", `0`, `0`, `0`, `0`);
1106	return USBD_INVAL;
1107	}
1108	return USBD_NORMAL_COMPLETION;
1109	} else {
1110	switch (ed->bmAttributes & UE_XFERTYPE) {
1111	case UE_CONTROL:
1112	spipe->ptype = PT_CTRL_SETUP;
1113	pipe->up_interval = `0`;
1114	break;
1115	case UE_INTERRUPT:
1116	spipe->ptype = PT_INTR;
1117	if (pipe->up_interval == USBD_DEFAULT_INTERVAL)
1118	pipe->up_interval = ed->bInterval;
1119	break;
1120	case UE_ISOCHRONOUS:
1121	return slhci_lock_call(sc, &slhci_isoc_warn, spipe,
1122	NULL);
1123	case UE_BULK:
1124	spipe->ptype = PT_BULK;
1125	pipe->up_interval = `0`;
1126	break;
1127	}
1128
1129	DLOG(D_MSG, "open pipe type %d interval %d", spipe->ptype,
1130	pipe->up_interval, `0`,`0`);
1131
1132	pipe->up_methods = __UNCONST(&slhci_pipe_methods);
1133
1134	return slhci_lock_call(sc, &slhci_open_pipe, spipe, NULL);
1135	}
1136	}
1137
1138	int
1139	slhci_supported_rev(uint8_t rev)
1140	{
1141	return rev >= SLTYPE_SL811HS_R12 && rev <= SLTYPE_SL811HS_R15;
1142	}
1143
1144	/*
1145	* Must be called before the ISR is registered. Interrupts can be shared so
1146	* slhci_intr could be called as soon as the ISR is registered.
1147	* Note max_current argument is actual current, but stored as current/2
1148	*/
1149	void
1150	slhci_preinit(struct slhci_softc *sc, PowerFunc pow, bus_space_tag_t iot,
1151	bus_space_handle_t ioh, uint16_t max_current, uint32_t stride)
1152	{
1153	struct slhci_transfers *t;
1154	int i;
1155
1156	t = &sc->sc_transfers;
1157
1158	#ifdef SLHCI_DEBUG
1159	ssc = sc;
1160	#endif
1161
1162	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_SOFTUSB);
1163	mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_USB);
1164
1165	/ sc->sc_ier = 0; /
1166	/ t->rootintr = NULL; /
1167	t->flags = F_NODEV\|F_UDISABLED;
1168	t->pend = INT_MAX;
1169	KASSERT(slhci_wait_time != INT_MAX);
1170	t->len[`0`] = t->len[`1`] = -`1`;
1171	if (max_current > `500`)
1172	max_current = `500`;
1173	t->max_current = (uint8_t)(max_current / `2`);
1174	sc->sc_enable_power = pow;
1175	sc->sc_iot = iot;
1176	sc->sc_ioh = ioh;
1177	sc->sc_stride = stride;
1178
1179	KASSERT(Q_MAX+`1` == sizeof(t->q) / sizeof(t->q[`0`]));
1180
1181	for (i = `0`; i <= Q_MAX; i++)
1182	gcq_init_head(&t->q[i]);
1183	gcq_init_head(&t->timed);
1184	gcq_init_head(&t->to);
1185	gcq_init_head(&t->ap);
1186	gcq_init_head(&sc->sc_waitq);
1187	}
1188
1189	int
1190	slhci_attach(struct slhci_softc *sc)
1191	{
1192	struct slhci_transfers *t;
1193	const char *rev;
1194
1195	t = &sc->sc_transfers;
1196
1197	/ Detect and check the controller type /
1198	t->sltype = SL11_GET_REV(slhci_read(sc, SL11_REV));
1199
1200	/ SL11H not supported /
1201	if (!slhci_supported_rev(t->sltype)) {
1202	if (t->sltype == SLTYPE_SL11H)
1203	printf("%s: SL11H unsupported or bus error!\n",
1204	SC_NAME(sc));
1205	else
1206	printf("%s: Unknown chip revision!\n", SC_NAME(sc));
1207	return -`1`;
1208	}
1209
1210	#ifdef SLHCI_DEBUG
1211	if (slhci_memtest(sc)) {
1212	printf("%s: memory/bus error!\n", SC_NAME(sc));
1213	return -`1`;
1214	}
1215	#endif
1216
1217	callout_init(&sc->sc_timer, CALLOUT_MPSAFE);
1218	callout_setfunc(&sc->sc_timer, slhci_reset_entry, sc);
1219
1220	/*
1221	* It is not safe to call the soft interrupt directly as
1222	* usb_schedsoftintr does in the ub_usepolling case (due to locking).
1223	*/
1224	sc->sc_cb_softintr = softint_establish(SOFTINT_NET,
1225	slhci_callback_entry, sc);
1226
1227	if (t->sltype == SLTYPE_SL811HS_R12)
1228	rev = "(rev 1.2)";
1229	else if (t->sltype == SLTYPE_SL811HS_R14)
1230	rev = "(rev 1.4 or 1.5)";
1231	else
1232	rev = "(unknown revision)";
1233
1234	aprint_normal("%s: ScanLogic SL811HS/T USB Host Controller %s\n",
1235	SC_NAME(sc), rev);
1236
1237	aprint_normal("%s: Max Current %u mA (value by code, not by probe)\n",
1238	SC_NAME(sc), t->max_current * `2`);
1239
1240	#if defined(SLHCI_DEBUG) \|\| defined(SLHCI_NO_OVERTIME) \|\| \
1241	defined(SLHCI_TRY_LSVH) \|\| defined(SLHCI_PROFILE_TRANSFER)
1242	aprint_normal("%s: driver options:"
1243	#ifdef SLHCI_DEBUG
1244	" SLHCI_DEBUG"
1245	#endif
1246	#ifdef SLHCI_TRY_LSVH
1247	" SLHCI_TRY_LSVH"
1248	#endif
1249	#ifdef SLHCI_NO_OVERTIME
1250	" SLHCI_NO_OVERTIME"
1251	#endif
1252	#ifdef SLHCI_PROFILE_TRANSFER
1253	" SLHCI_PROFILE_TRANSFER"
1254	#endif
1255	"\n", SC_NAME(sc));
1256	#endif
1257	sc->sc_bus.ub_revision = USBREV_1_1;
1258	sc->sc_bus.ub_methods = __UNCONST(&slhci_bus_methods);
1259	sc->sc_bus.ub_pipesize = sizeof(struct slhci_pipe);
1260	sc->sc_bus.ub_usedma = false;
1261
1262	if (!sc->sc_enable_power)
1263	t->flags \|= F_REALPOWER;
1264
1265	t->flags \|= F_ACTIVE;
1266
1267	/ Attach usb and uhub. /
1268	sc->sc_child = config_found(SC_DEV(sc), &sc->sc_bus, usbctlprint);
1269
1270	if (!sc->sc_child)
1271	return -`1`;
1272	else
1273	return `0`;
1274	}
1275
1276	int
1277	slhci_detach(struct slhci_softc sc, int* flags)
1278	{
1279	struct slhci_transfers *t;
1280	int ret;
1281
1282	t = &sc->sc_transfers;
1283
1284	/ By this point bus access is no longer allowed. /
1285
1286	KASSERT(!(t->flags & F_ACTIVE));
1287
1288	/*
1289	* To be MPSAFE is not sufficient to cancel callouts and soft
1290	* interrupts and assume they are dead since the code could already be
1291	* running or about to run. Wait until they are known to be done.
1292	*/
1293	while (t->flags & (F_RESET\|F_CALLBACK))
1294	tsleep(&sc, PPAUSE, "slhci_detach", hz);
1295
1296	softint_disestablish(sc->sc_cb_softintr);
1297
1298	mutex_destroy(&sc->sc_lock);
1299	mutex_destroy(&sc->sc_intr_lock);
1300
1301	ret = `0`;
1302
1303	if (sc->sc_child)
1304	ret = config_detach(sc->sc_child, flags);
1305
1306	#ifdef SLHCI_MEM_ACCOUNTING
1307	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1308	if (sc->sc_mem_use) {
1309	printf("%s: Memory still in use after detach! mem_use (count)"
1310	" = %d\n", SC_NAME(sc), sc->sc_mem_use);
1311	DDOLOG("Memory still in use after detach! mem_use (count)"
1312	" = %d", sc->sc_mem_use, `0`, `0`, `0`);
1313	}
1314	#endif
1315
1316	return ret;
1317	}
1318
1319	int
1320	slhci_activate(device_t self, enum devact act)
1321	{
1322	struct slhci_softc *sc = device_private(self);
1323
1324	switch (act) {
1325	case DVACT_DEACTIVATE:
1326	slhci_lock_call(sc, &slhci_halt, NULL, NULL);
1327	return `0`;
1328	default:
1329	return EOPNOTSUPP;
1330	}
1331	}
1332
1333	void
1334	slhci_abort(struct usbd_xfer *xfer)
1335	{
1336	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1337	struct slhci_softc *sc;
1338	struct slhci_pipe *spipe;
1339
1340	spipe = SLHCI_PIPE2SPIPE(xfer->ux_pipe);
1341
1342	if (spipe == NULL)
1343	goto callback;
1344
1345	sc = SLHCI_XFER2SC(xfer);
1346	KASSERT(mutex_owned(&sc->sc_lock));
1347
1348	DLOG(D_TRACE, "transfer type %d abort xfer %p spipe %p spipe->xfer %p",
1349	spipe->ptype, xfer, spipe, spipe->xfer);
1350
1351	slhci_lock_call(sc, &slhci_do_abort, spipe, xfer);
1352
1353	callback:
1354	xfer->ux_status = USBD_CANCELLED;
1355	usb_transfer_complete(xfer);
1356	}
1357
1358	void
1359	slhci_close(struct usbd_pipe *pipe)
1360	{
1361	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1362	struct slhci_softc *sc;
1363	struct slhci_pipe *spipe;
1364
1365	sc = SLHCI_PIPE2SC(pipe);
1366	spipe = SLHCI_PIPE2SPIPE(pipe);
1367
1368	DLOG(D_TRACE, "transfer type %d close spipe %p spipe->xfer %p",
1369	spipe->ptype, spipe, spipe->xfer, `0`);
1370
1371	slhci_lock_call(sc, &slhci_close_pipe, spipe, NULL);
1372	}
1373
1374	void
1375	slhci_clear_toggle(struct usbd_pipe *pipe)
1376	{
1377	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1378	struct slhci_pipe *spipe;
1379
1380	spipe = SLHCI_PIPE2SPIPE(pipe);
1381
1382	DLOG(D_TRACE, "transfer type %d toggle spipe %p", spipe->ptype,
1383	spipe,`0`,`0`);
1384
1385	spipe->pflags &= ~PF_TOGGLE;
1386
1387	#ifdef DIAGNOSTIC
1388	if (spipe->xfer != NULL) {
1389	struct slhci_softc sc = (struct* slhci_softc
1390	*)pipe->up_dev->ud_bus;
1391
1392	printf("%s: Clear toggle on transfer in progress! halted\n",
1393	SC_NAME(sc));
1394	DDOLOG("Clear toggle on transfer in progress! halted",
1395	`0`, `0`, `0`, `0`);
1396	slhci_halt(sc, NULL, NULL);
1397	}
1398	#endif
1399	}
1400
1401	void
1402	slhci_poll(struct usbd_bus bus) /* XXX necessary? /
1403	{
1404	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1405	struct slhci_softc *sc;
1406
1407	sc = SLHCI_BUS2SC(bus);
1408
1409	DLOG(D_TRACE, "slhci_poll", `0`,`0`,`0`,`0`);
1410
1411	slhci_lock_call(sc, &slhci_do_poll, NULL, NULL);
1412	}
1413
1414	void
1415	slhci_done(struct usbd_xfer *xfer)
1416	{
1417	}
1418
1419	void
1420	slhci_void(void *v) {}
1421
1422	/ End out of lock functions. Start lock entry functions. /
1423
1424	#ifdef SLHCI_MEM_ACCOUNTING
1425	void
1426	slhci_mem_use(struct usbd_bus bus, int* val)
1427	{
1428	struct slhci_softc *sc = SLHCI_BUS2SC(bus);
1429
1430	mutex_enter(&sc->sc_intr_lock);
1431	sc->sc_mem_use += val;
1432	mutex_exit(&sc->sc_intr_lock);
1433	}
1434	#endif
1435
1436	void
1437	slhci_reset_entry(void *arg)
1438	{
1439	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1440	struct slhci_softc *sc = arg;
1441
1442	mutex_enter(&sc->sc_intr_lock);
1443	slhci_reset(sc);
1444	/*
1445	* We cannot call the callback directly since we could then be reset
1446	* again before finishing and need the callout delay for timing.
1447	* Scheduling the callout again before we exit would defeat the reap
1448	* mechanism since we could be unlocked while the reset flag is not
1449	* set. The callback code will check the wait queue.
1450	*/
1451	slhci_callback_schedule(sc);
1452	mutex_exit(&sc->sc_intr_lock);
1453	}
1454
1455	usbd_status
1456	slhci_lock_call(struct slhci_softc sc, LockCallFunc lcf, struct* slhci_pipe
1457	spipe, struct* usbd_xfer *xfer)
1458	{
1459	usbd_status ret;
1460
1461	mutex_enter(&sc->sc_intr_lock);
1462	ret = (*lcf)(sc, spipe, xfer);
1463	slhci_main(sc);
1464	mutex_exit(&sc->sc_intr_lock);
1465
1466	return ret;
1467	}
1468
1469	void
1470	slhci_start_entry(struct slhci_softc sc, struct* slhci_pipe *spipe)
1471	{
1472	struct slhci_transfers *t;
1473
1474	mutex_enter(&sc->sc_intr_lock);
1475	t = &sc->sc_transfers;
1476
1477	if (!(t->flags & (F_AINPROG\|F_BINPROG))) {
1478	slhci_enter_xfer(sc, spipe);
1479	slhci_dotransfer(sc);
1480	slhci_main(sc);
1481	} else {
1482	enter_waitq(sc, spipe);
1483	}
1484	mutex_exit(&sc->sc_intr_lock);
1485	}
1486
1487	void
1488	slhci_callback_entry(void *arg)
1489	{
1490	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1491	struct slhci_softc *sc;
1492	struct slhci_transfers *t;
1493
1494	sc = (struct slhci_softc *)arg;
1495
1496	mutex_enter(&sc->sc_intr_lock);
1497	t = &sc->sc_transfers;
1498	DLOG(D_SOFT, "callback_entry flags %#x", t->flags, `0`,`0`,`0`);
1499
1500	repeat:
1501	slhci_callback(sc);
1502
1503	if (!gcq_empty(&sc->sc_waitq)) {
1504	slhci_enter_xfers(sc);
1505	slhci_dotransfer(sc);
1506	slhci_waitintr(sc, `0`);
1507	goto repeat;
1508	}
1509
1510	t->flags &= ~F_CALLBACK;
1511	mutex_exit(&sc->sc_intr_lock);
1512	}
1513
1514	void
1515	slhci_do_callback(struct slhci_softc sc, struct* usbd_xfer *xfer)
1516	{
1517	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1518	KASSERT(mutex_owned(&sc->sc_intr_lock));
1519
1520	start_cc_time(&t_callback, (u_int)xfer);
1521	mutex_exit(&sc->sc_intr_lock);
1522
1523	mutex_enter(&sc->sc_lock);
1524	usb_transfer_complete(xfer);
1525	mutex_exit(&sc->sc_lock);
1526
1527	mutex_enter(&sc->sc_intr_lock);
1528	stop_cc_time(&t_callback);
1529	}
1530
1531	int
1532	slhci_intr(void *arg)
1533	{
1534	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1535	struct slhci_softc *sc = arg;
1536	int ret = `0`;
1537	int irq;
1538
1539	start_cc_time(&t_hard_int, (unsigned int)arg);
1540	mutex_enter(&sc->sc_intr_lock);
1541
1542	do {
1543	irq = slhci_dointr(sc);
1544	ret \|= irq;
1545	slhci_main(sc);
1546	} while (irq);
1547	mutex_exit(&sc->sc_intr_lock);
1548
1549	stop_cc_time(&t_hard_int);
1550	return ret;
1551	}
1552
1553	/ called with interrupt lock only held. /
1554	void
1555	slhci_main(struct slhci_softc *sc)
1556	{
1557	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1558	struct slhci_transfers *t;
1559
1560	t = &sc->sc_transfers;
1561
1562	KASSERT(mutex_owned(&sc->sc_intr_lock));
1563
1564	waitcheck:
1565	slhci_waitintr(sc, slhci_wait_time);
1566
1567	/*
1568	* The direct call is needed in the ub_usepolling and disabled cases
1569	* since the soft interrupt is not available. In the disabled case,
1570	* this code can be reached from the usb detach, after the reaping of
1571	* the soft interrupt. That test could be !F_ACTIVE, but there is no
1572	* reason not to make the callbacks directly in the other DISABLED
1573	* cases.
1574	*/
1575	if ((t->flags & F_ROOTINTR) \|\| !gcq_empty(&t->q[Q_CALLBACKS])) {
1576	if (__predict_false(sc->sc_bus.ub_usepolling \|\|
1577	t->flags & F_DISABLED))
1578	slhci_callback(sc);
1579	else
1580	slhci_callback_schedule(sc);
1581	}
1582
1583	if (!gcq_empty(&sc->sc_waitq)) {
1584	slhci_enter_xfers(sc);
1585	slhci_dotransfer(sc);
1586	goto waitcheck;
1587	}
1588	DLOG(D_INTR, "... done", `0`, `0`, `0`, `0`);
1589	}
1590
1591	/ End lock entry functions. Start in lock function. /
1592
1593	/ Register read/write routines and barriers. /
1594	#ifdef SLHCI_BUS_SPACE_BARRIERS
1595	#define BSB(a, b, c, d, e) bus_space_barrier(a, b, c, d, BUS_SPACE_BARRIER_ # e)
1596	#define BSB_SYNC(a, b, c, d) bus_space_barrier(a, b, c, d, BUS_SPACE_BARRIER_READ\|BUS_SPACE_BARRIER_WRITE)
1597	#else /* now !SLHCI_BUS_SPACE_BARRIERS */
1598	#define BSB(a, b, c, d, e) __USE(d)
1599	#define BSB_SYNC(a, b, c, d)
1600	#endif /* SLHCI_BUS_SPACE_BARRIERS */
1601
1602	static void
1603	slhci_write(struct slhci_softc *sc, uint8_t addr, uint8_t data)
1604	{
1605	bus_size_t paddr, pdata, pst, psz;
1606	bus_space_tag_t iot;
1607	bus_space_handle_t ioh;
1608
1609	paddr = pst = `0`;
1610	pdata = sc->sc_stride;
1611	psz = pdata * `2`;
1612	iot = sc->sc_iot;
1613	ioh = sc->sc_ioh;
1614
1615	bus_space_write_1(iot, ioh, paddr, addr);
1616	BSB(iot, ioh, pst, psz, WRITE_BEFORE_WRITE);
1617	bus_space_write_1(iot, ioh, pdata, data);
1618	BSB(iot, ioh, pst, psz, WRITE_BEFORE_WRITE);
1619	}
1620
1621	static uint8_t
1622	slhci_read(struct slhci_softc *sc, uint8_t addr)
1623	{
1624	bus_size_t paddr, pdata, pst, psz;
1625	bus_space_tag_t iot;
1626	bus_space_handle_t ioh;
1627	uint8_t data;
1628
1629	paddr = pst = `0`;
1630	pdata = sc->sc_stride;
1631	psz = pdata * `2`;
1632	iot = sc->sc_iot;
1633	ioh = sc->sc_ioh;
1634
1635	bus_space_write_1(iot, ioh, paddr, addr);
1636	BSB(iot, ioh, pst, psz, WRITE_BEFORE_READ);
1637	data = bus_space_read_1(iot, ioh, pdata);
1638	BSB(iot, ioh, pst, psz, READ_BEFORE_WRITE);
1639	return data;
1640	}
1641
1642	#if 0 /* auto-increment mode broken, see errata doc */
1643	static void
1644	slhci_write_multi(struct slhci_softc sc, uint8_t addr, uint8_t buf, int l)
1645	{
1646	bus_size_t paddr, pdata, pst, psz;
1647	bus_space_tag_t iot;
1648	bus_space_handle_t ioh;
1649
1650	paddr = pst = `0`;
1651	pdata = sc->sc_stride;
1652	psz = pdata * `2`;
1653	iot = sc->sc_iot;
1654	ioh = sc->sc_ioh;
1655
1656	bus_space_write_1(iot, ioh, paddr, addr);
1657	BSB(iot, ioh, pst, psz, WRITE_BEFORE_WRITE);
1658	bus_space_write_multi_1(iot, ioh, pdata, buf, l);
1659	BSB(iot, ioh, pst, psz, WRITE_BEFORE_WRITE);
1660	}
1661
1662	static void
1663	slhci_read_multi(struct slhci_softc sc, uint8_t addr, uint8_t buf, int l)
1664	{
1665	bus_size_t paddr, pdata, pst, psz;
1666	bus_space_tag_t iot;
1667	bus_space_handle_t ioh;
1668
1669	paddr = pst = `0`;
1670	pdata = sc->sc_stride;
1671	psz = pdata * `2`;
1672	iot = sc->sc_iot;
1673	ioh = sc->sc_ioh;
1674
1675	bus_space_write_1(iot, ioh, paddr, addr);
1676	BSB(iot, ioh, pst, psz, WRITE_BEFORE_READ);
1677	bus_space_read_multi_1(iot, ioh, pdata, buf, l);
1678	BSB(iot, ioh, pst, psz, READ_BEFORE_WRITE);
1679	}
1680	#else
1681	static void
1682	slhci_write_multi(struct slhci_softc sc, uint8_t addr, uint8_t buf, int l)
1683	{
1684	#if 1
1685	for (; l; addr++, buf++, l--)
1686	slhci_write(sc, addr, *buf);
1687	#else
1688	bus_size_t paddr, pdata, pst, psz;
1689	bus_space_tag_t iot;
1690	bus_space_handle_t ioh;
1691
1692	paddr = pst = `0`;
1693	pdata = sc->sc_stride;
1694	psz = pdata * `2`;
1695	iot = sc->sc_iot;
1696	ioh = sc->sc_ioh;
1697
1698	for (; l; addr++, buf++, l--) {
1699	bus_space_write_1(iot, ioh, paddr, addr);
1700	BSB(iot, ioh, pst, psz, WRITE_BEFORE_WRITE);
1701	bus_space_write_1(iot, ioh, pdata, *buf);
1702	BSB(iot, ioh, pst, psz, WRITE_BEFORE_WRITE);
1703	}
1704	#endif
1705	}
1706
1707	static void
1708	slhci_read_multi(struct slhci_softc sc, uint8_t addr, uint8_t buf, int l)
1709	{
1710	#if 1
1711	for (; l; addr++, buf++, l--)
1712	*buf = slhci_read(sc, addr);
1713	#else
1714	bus_size_t paddr, pdata, pst, psz;
1715	bus_space_tag_t iot;
1716	bus_space_handle_t ioh;
1717
1718	paddr = pst = `0`;
1719	pdata = sc->sc_stride;
1720	psz = pdata * `2`;
1721	iot = sc->sc_iot;
1722	ioh = sc->sc_ioh;
1723
1724	for (; l; addr++, buf++, l--) {
1725	bus_space_write_1(iot, ioh, paddr, addr);
1726	BSB(iot, ioh, pst, psz, WRITE_BEFORE_READ);
1727	*buf = bus_space_read_1(iot, ioh, pdata);
1728	BSB(iot, ioh, pst, psz, READ_BEFORE_WRITE);
1729	}
1730	#endif
1731	}
1732	#endif
1733
1734	/*
1735	* After calling waitintr it is necessary to either call slhci_callback or
1736	* schedule the callback if necessary. The callback cannot be called directly
1737	* from the hard interrupt since it interrupts at a high IPL and callbacks
1738	* can do copyout and such.
1739	*/
1740	static void
1741	slhci_waitintr(struct slhci_softc sc, int* wait_time)
1742	{
1743	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1744	struct slhci_transfers *t;
1745
1746	t = &sc->sc_transfers;
1747
1748	KASSERT(mutex_owned(&sc->sc_intr_lock));
1749
1750	if (__predict_false(sc->sc_bus.ub_usepolling))
1751	wait_time = `12000`;
1752
1753	while (t->pend <= wait_time) {
1754	DLOG(D_WAIT, "waiting... frame %d pend %d flags %#x",
1755	t->frame, t->pend, t->flags, `0`);
1756	LK_SLASSERT(t->flags & F_ACTIVE, sc, NULL, NULL, return);
1757	LK_SLASSERT(t->flags & (F_AINPROG\|F_BINPROG), sc, NULL, NULL,
1758	return);
1759	slhci_dointr(sc);
1760	}
1761	DLOG(D_WAIT, "... done", `0`, `0`, `0`, `0`);
1762	}
1763
1764	static int
1765	slhci_dointr(struct slhci_softc *sc)
1766	{
1767	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1768	struct slhci_transfers *t;
1769	struct slhci_pipe *tosp;
1770	uint8_t r;
1771
1772	t = &sc->sc_transfers;
1773
1774	KASSERT(mutex_owned(&sc->sc_intr_lock));
1775
1776	if (sc->sc_ier == `0`) {
1777	DLOG(D_INTR, "sc_ier is zero", `0`, `0`, `0`, `0`);
1778	return `0`;
1779	}
1780
1781	r = slhci_read(sc, SL11_ISR);
1782
1783	#ifdef SLHCI_DEBUG
1784	if (slhcidebug & SLHCI_D_INTR && r & sc->sc_ier &&
1785	((r & ~(SL11_ISR_SOF\|SL11_ISR_DATA)) \|\| slhcidebug & SLHCI_D_SOF)) {
1786	uint8_t e, f;
1787
1788	e = slhci_read(sc, SL11_IER);
1789	f = slhci_read(sc, SL11_CTRL);
1790	DDOLOG("Flags=%#x IER=%#x ISR=%#x CTRL=%#x", t->flags, e, r, f);
1791	DDOLOGCTRL(f);
1792	DDOLOGISR(r);
1793	}
1794	#endif
1795
1796	/*
1797	* check IER for corruption occasionally. Assume that the above
1798	* sc_ier == 0 case works correctly.
1799	*/
1800	if (__predict_false(sc->sc_ier_check++ > SLHCI_IER_CHECK_FREQUENCY)) {
1801	sc->sc_ier_check = `0`;
1802	if (sc->sc_ier != slhci_read(sc, SL11_IER)) {
1803	printf("%s: IER value corrupted! halted\n",
1804	SC_NAME(sc));
1805	DDOLOG("IER value corrupted! halted", `0`, `0`, `0`, `0`);
1806	slhci_halt(sc, NULL, NULL);
1807	return `1`;
1808	}
1809	}
1810
1811	r &= sc->sc_ier;
1812
1813	if (r == `0`) {
1814	DLOG(D_INTR, "r is zero", `0`, `0`, `0`, `0`);
1815	return `0`;
1816	}
1817
1818	sc->sc_ier_check = `0`;
1819
1820	slhci_write(sc, SL11_ISR, r);
1821	BSB_SYNC(sc->iot, sc->ioh, sc->pst, sc->psz);
1822
1823	/ If we have an insertion event we do not care about anything else. /
1824	if (__predict_false(r & SL11_ISR_INSERT)) {
1825	slhci_insert(sc);
1826	DLOG(D_INTR, "... done", `0`, `0`, `0`, `0`);
1827	return `1`;
1828	}
1829
1830	stop_cc_time(&t_intr);
1831	start_cc_time(&t_intr, r);
1832
1833	if (r & SL11_ISR_SOF) {
1834	t->frame++;
1835
1836	gcq_merge_tail(&t->q[Q_CB], &t->q[Q_NEXT_CB]);
1837
1838	/*
1839	* SOFCHECK flags are cleared in tstart. Two flags are needed
1840	* since the first SOF interrupt processed after the transfer
1841	* is started might have been generated before the transfer
1842	* was started.
1843	*/
1844	if (__predict_false(t->flags & F_SOFCHECK2 && t->flags &
1845	(F_AINPROG\|F_BINPROG))) {
1846	printf("%s: Missed transfer completion. halted\n",
1847	SC_NAME(sc));
1848	DDOLOG("Missed transfer completion. halted", `0`, `0`, `0`,
1849	`0`);
1850	slhci_halt(sc, NULL, NULL);
1851	return `1`;
1852	} else if (t->flags & F_SOFCHECK1) {
1853	t->flags \|= F_SOFCHECK2;
1854	} else
1855	t->flags \|= F_SOFCHECK1;
1856
1857	if (t->flags & F_CHANGE)
1858	t->flags \|= F_ROOTINTR;
1859
1860	while (__predict_true(GOT_FIRST_TO(tosp, t)) &&
1861	__predict_false(tosp->to_frame <= t->frame)) {
1862	tosp->xfer->ux_status = USBD_TIMEOUT;
1863	slhci_do_abort(sc, tosp, tosp->xfer);
1864	enter_callback(t, tosp);
1865	}
1866
1867	/*
1868	* Start any waiting transfers right away. If none, we will
1869	* start any new transfers later.
1870	*/
1871	slhci_tstart(sc);
1872	}
1873
1874	if (r & (SL11_ISR_USBA\|SL11_ISR_USBB)) {
1875	int ab;
1876
1877	if ((r & (SL11_ISR_USBA\|SL11_ISR_USBB)) ==
1878	(SL11_ISR_USBA\|SL11_ISR_USBB)) {
1879	if (!(t->flags & (F_AINPROG\|F_BINPROG)))
1880	return `1`; / presume card pulled /
1881
1882	LK_SLASSERT((t->flags & (F_AINPROG\|F_BINPROG)) !=
1883	(F_AINPROG\|F_BINPROG), sc, NULL, NULL, return `1`);
1884
1885	/*
1886	* This should never happen (unless card removal just
1887	* occurred) but appeared frequently when both
1888	* transfers were started at the same time and was
1889	* accompanied by data corruption. It still happens
1890	* at times. I have not seen data correption except
1891	* when the STATUS bit gets set, which now causes the
1892	* driver to halt, however this should still not
1893	* happen so the warning is kept. See comment in
1894	* abdone, below.
1895	*/
1896	printf("%s: Transfer reported done but not started! "
1897	"Verify data integrity if not detaching. "
1898	" flags %#x r %x\n", SC_NAME(sc), t->flags, r);
1899
1900	if (!(t->flags & F_AINPROG))
1901	r &= ~SL11_ISR_USBA;
1902	else
1903	r &= ~SL11_ISR_USBB;
1904	}
1905	t->pend = INT_MAX;
1906
1907	if (r & SL11_ISR_USBA)
1908	ab = A;
1909	else
1910	ab = B;
1911
1912	/*
1913	* This happens when a low speed device is attached to
1914	* a hub with chip rev 1.5. SOF stops, but a few transfers
1915	* still work before causing this error.
1916	*/
1917	if (!(t->flags & (ab ? F_BINPROG : F_AINPROG))) {
1918	printf("%s: %s done but not in progress! halted\n",
1919	SC_NAME(sc), ab ? "B" : "A");
1920	DDOLOG("AB=%d done but not in progress! halted", ab,
1921	`0`, `0`, `0`);
1922	slhci_halt(sc, NULL, NULL);
1923	return `1`;
1924	}
1925
1926	t->flags &= ~(ab ? F_BINPROG : F_AINPROG);
1927	slhci_tstart(sc);
1928	stop_cc_time(&t_ab[ab]);
1929	start_cc_time(&t_abdone, t->flags);
1930	slhci_abdone(sc, ab);
1931	stop_cc_time(&t_abdone);
1932	}
1933
1934	slhci_dotransfer(sc);
1935
1936	DLOG(D_INTR, "... done", `0`, `0`, `0`, `0`);
1937
1938	return `1`;
1939	}
1940
1941	static void
1942	slhci_abdone(struct slhci_softc sc, int* ab)
1943	{
1944	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
1945	struct slhci_transfers *t;
1946	struct slhci_pipe *spipe;
1947	struct usbd_xfer *xfer;
1948	uint8_t status, buf_start;
1949	uint8_t *target_buf;
1950	unsigned int actlen;
1951	int head;
1952
1953	t = &sc->sc_transfers;
1954
1955	KASSERT(mutex_owned(&sc->sc_intr_lock));
1956
1957	DLOG(D_TRACE, "ABDONE flags %#x", t->flags, `0`,`0`,`0`);
1958
1959	DLOG(D_MSG, "DONE AB=%d spipe %p len %d xfer %p", ab, t->spipe[ab],
1960	t->len[ab], t->spipe[ab] ? t->spipe[ab]->xfer : NULL);
1961
1962	spipe = t->spipe[ab];
1963
1964	/*
1965	* skip this one if aborted; do not call return from the rest of the
1966	* function unless halting, else t->len will not be cleared.
1967	*/
1968	if (spipe == NULL)
1969	goto done;
1970
1971	t->spipe[ab] = NULL;
1972
1973	xfer = spipe->xfer;
1974
1975	gcq_remove(&spipe->to);
1976
1977	LK_SLASSERT(xfer != NULL, sc, spipe, NULL, return);
1978
1979	status = slhci_read(sc, slhci_tregs[ab][STAT]);
1980
1981	/*
1982	* I saw no status or remaining length greater than the requested
1983	* length in early driver versions in circumstances I assumed caused
1984	* excess power draw. I am no longer able to reproduce this when
1985	* causing excess power draw circumstances.
1986	*
1987	* Disabling a power check and attaching aue to a keyboard and hub
1988	* that is directly attached (to CFU1U, 100mA max, aue 160mA, keyboard
1989	* 98mA) sometimes works and sometimes fails to configure. After
1990	* removing the aue and attaching a self-powered umass dvd reader
1991	* (unknown if it draws power from the host also) soon a single Error
1992	* status occurs then only timeouts. The controller soon halts freeing
1993	* memory due to being ONQU instead of BUSY. This may be the same
1994	* basic sequence that caused the no status/bad length errors. The
1995	* umass device seems to work (better at least) with the keyboard hub
1996	* when not first attaching aue (tested once reading an approximately
1997	* 200MB file).
1998	*
1999	* Overflow can indicate that the device and host disagree about how
2000	* much data has been transfered. This may indicate a problem at any
2001	* point during the transfer, not just when the error occurs. It may
2002	* indicate data corruption. A warning message is printed.
2003	*
2004	* Trying to use both A and B transfers at the same time results in
2005	* incorrect transfer completion ISR reports and the status will then
2006	* include SL11_EPSTAT_SETUP, which is apparently set while the
2007	* transfer is in progress. I also noticed data corruption, even
2008	* after waiting for the transfer to complete. The driver now avoids
2009	* trying to start both at the same time.
2010	*
2011	* I had accidently initialized the B registers before they were valid
2012	* in some driver versions. Since every other performance enhancing
2013	* feature has been confirmed buggy in the errata doc, I have not
2014	* tried both transfers at once again with the documented
2015	* initialization order.
2016	*
2017	* However, I have seen this problem again ("done but not started"
2018	* errors), which in some cases cases the SETUP status bit to remain
2019	* set on future transfers. In other cases, the SETUP bit is not set
2020	* and no data corruption occurs. This occured while using both umass
2021	* and aue on a powered hub (maybe triggered by some local activity
2022	* also) and needs several reads of the 200MB file to trigger. The
2023	* driver now halts if SETUP is detected.
2024	*/
2025
2026	actlen = `0`;
2027
2028	if (__predict_false(!status)) {
2029	DDOLOG("no status! xfer %p spipe %p", xfer, spipe, `0`,`0`);
2030	printf("%s: no status! halted\n", SC_NAME(sc));
2031	slhci_halt(sc, spipe, xfer);
2032	return;
2033	}
2034
2035	#ifdef SLHCI_DEBUG
2036	if ((slhcidebug & SLHCI_D_NAK) \|\|
2037	(status & SL11_EPSTAT_ERRBITS) != SL11_EPSTAT_NAK) {
2038	DDOLOG("USB Status = %#.2x", status, `0`, `0`, `0`);
2039	DDOLOGSTATUS(status);
2040	}
2041	#endif
2042
2043	if (!(status & SL11_EPSTAT_ERRBITS)) {
2044	unsigned int cont = slhci_read(sc, slhci_tregs[ab][CONT]);
2045	unsigned int len = spipe->tregs[LEN];
2046	DLOG(D_XFER, "cont %d len %d", cont, len, `0`, `0`);
2047	if ((status & SL11_EPSTAT_OVERFLOW) \|\| cont > len) {
2048	DDOLOG("overflow - cont %d len %d xfer->ux_length %d "
2049	"xfer->actlen %d", cont, len, xfer->ux_length,
2050	xfer->ux_actlen);
2051	printf("%s: overflow cont %d len %d xfer->ux_length"
2052	" %d xfer->ux_actlen %d\n", SC_NAME(sc), cont,
2053	len, xfer->ux_length, xfer->ux_actlen);
2054	actlen = len;
2055	} else {
2056	actlen = len - cont;
2057	}
2058	spipe->nerrs = `0`;
2059	}
2060
2061	/ Actual copyin done after starting next transfer. /
2062	if (actlen && (spipe->tregs[PID] & SL11_PID_BITS) == SL11_PID_IN) {
2063	target_buf = spipe->buffer;
2064	buf_start = spipe->tregs[ADR];
2065	} else {
2066	target_buf = NULL;
2067	buf_start = `0`; / XXX gcc uninitialized warnings /
2068	}
2069
2070	if (status & SL11_EPSTAT_ERRBITS) {
2071	status &= SL11_EPSTAT_ERRBITS;
2072	if (status & SL11_EPSTAT_SETUP) {
2073	printf("%s: Invalid controller state detected! "
2074	"halted\n", SC_NAME(sc));
2075	DDOLOG("Invalid controller state detected! "
2076	"halted", `0`, `0`, `0`, `0`);
2077	slhci_halt(sc, spipe, xfer);
2078	return;
2079	} else if (__predict_false(sc->sc_bus.ub_usepolling)) {
2080	head = Q_CALLBACKS;
2081	if (status & SL11_EPSTAT_STALL)
2082	xfer->ux_status = USBD_STALLED;
2083	else if (status & SL11_EPSTAT_TIMEOUT)
2084	xfer->ux_status = USBD_TIMEOUT;
2085	else if (status & SL11_EPSTAT_NAK)
2086	head = Q_NEXT_CB;
2087	else
2088	xfer->ux_status = USBD_IOERROR;
2089	} else if (status & SL11_EPSTAT_NAK) {
2090	int i = spipe->pipe.up_interval;
2091	if (i == `0`)
2092	i = `1`;
2093	DDOLOG("xfer %p spipe %p NAK delay by %d", xfer, spipe,
2094	i, `0`);
2095	spipe->lastframe = spipe->frame = t->frame + i;
2096	slhci_queue_timed(sc, spipe);
2097	goto queued;
2098	} else if (++spipe->nerrs > SLHCI_MAX_RETRIES \|\|
2099	(status & SL11_EPSTAT_STALL)) {
2100	DDOLOG("xfer %p spipe %p nerrs %d", xfer, spipe,
2101	spipe->nerrs, `0`);
2102	if (status & SL11_EPSTAT_STALL)
2103	xfer->ux_status = USBD_STALLED;
2104	else if (status & SL11_EPSTAT_TIMEOUT)
2105	xfer->ux_status = USBD_TIMEOUT;
2106	else
2107	xfer->ux_status = USBD_IOERROR;
2108
2109	DLOG(D_ERR, "Max retries reached! status %#x "
2110	"xfer->ux_status %d", status, xfer->ux_status, `0`,
2111	`0`);
2112	DDOLOGSTATUS(status);
2113
2114	head = Q_CALLBACKS;
2115	} else {
2116	head = Q_NEXT_CB;
2117	}
2118	} else if (spipe->ptype == PT_CTRL_SETUP) {
2119	spipe->tregs[PID] = spipe->newpid;
2120
2121	if (xfer->ux_length) {
2122	LK_SLASSERT(spipe->newlen[`1`] != `0`, sc, spipe, xfer,
2123	return);
2124	spipe->tregs[LEN] = spipe->newlen[`1`];
2125	spipe->bustime = spipe->newbustime[`1`];
2126	spipe->buffer = xfer->ux_buf;
2127	spipe->ptype = PT_CTRL_DATA;
2128	} else {
2129	status_setup:
2130	/ CTRL_DATA swaps direction in PID then jumps here /
2131	spipe->tregs[LEN] = `0`;
2132	if (spipe->pflags & PF_LS)
2133	spipe->bustime = SLHCI_LS_CONST;
2134	else
2135	spipe->bustime = SLHCI_FS_CONST;
2136	spipe->ptype = PT_CTRL_STATUS;
2137	spipe->buffer = NULL;
2138	}
2139
2140	/ Status or first data packet must be DATA1. /
2141	spipe->control \|= SL11_EPCTRL_DATATOGGLE;
2142	if ((spipe->tregs[PID] & SL11_PID_BITS) == SL11_PID_IN)
2143	spipe->control &= ~SL11_EPCTRL_DIRECTION;
2144	else
2145	spipe->control \|= SL11_EPCTRL_DIRECTION;
2146
2147	head = Q_CB;
2148	} else if (spipe->ptype == PT_CTRL_STATUS) {
2149	head = Q_CALLBACKS;
2150	} else { / bulk, intr, control data /
2151	xfer->ux_actlen += actlen;
2152	spipe->control ^= SL11_EPCTRL_DATATOGGLE;
2153
2154	if (actlen == spipe->tregs[LEN] &&
2155	(xfer->ux_length > xfer->ux_actlen \|\| spipe->wantshort)) {
2156	spipe->buffer += actlen;
2157	LK_SLASSERT(xfer->ux_length >= xfer->ux_actlen, sc,
2158	spipe, xfer, return);
2159	if (xfer->ux_length - xfer->ux_actlen < actlen) {
2160	spipe->wantshort = `0`;
2161	spipe->tregs[LEN] = spipe->newlen[`0`];
2162	spipe->bustime = spipe->newbustime[`0`];
2163	LK_SLASSERT(xfer->ux_actlen +
2164	spipe->tregs[LEN] == xfer->ux_length, sc,
2165	spipe, xfer, return);
2166	}
2167	head = Q_CB;
2168	} else if (spipe->ptype == PT_CTRL_DATA) {
2169	spipe->tregs[PID] ^= SLHCI_PID_SWAP_IN_OUT;
2170	goto status_setup;
2171	} else {
2172	if (spipe->ptype == PT_INTR) {
2173	spipe->lastframe +=
2174	spipe->pipe.up_interval;
2175	/*
2176	* If ack, we try to keep the
2177	* interrupt rate by using lastframe
2178	* instead of the current frame.
2179	*/
2180	spipe->frame = spipe->lastframe +
2181	spipe->pipe.up_interval;
2182	}
2183
2184	/*
2185	* Set the toggle for the next transfer. It
2186	* has already been toggled above, so the
2187	* current setting will apply to the next
2188	* transfer.
2189	*/
2190	if (spipe->control & SL11_EPCTRL_DATATOGGLE)
2191	spipe->pflags \|= PF_TOGGLE;
2192	else
2193	spipe->pflags &= ~PF_TOGGLE;
2194
2195	head = Q_CALLBACKS;
2196	}
2197	}
2198
2199	if (head == Q_CALLBACKS) {
2200	gcq_remove(&spipe->to);
2201
2202	if (xfer->ux_status == USBD_IN_PROGRESS) {
2203	LK_SLASSERT(xfer->ux_actlen <= xfer->ux_length, sc,
2204	spipe, xfer, return);
2205	xfer->ux_status = USBD_NORMAL_COMPLETION;
2206	}
2207	}
2208
2209	enter_q(t, spipe, head);
2210
2211	queued:
2212	if (target_buf != NULL) {
2213	slhci_dotransfer(sc);
2214	start_cc_time(&t_copy_from_dev, actlen);
2215	slhci_read_multi(sc, buf_start, target_buf, actlen);
2216	stop_cc_time(&t_copy_from_dev);
2217	DLOGBUF(D_BUF, target_buf, actlen);
2218	t->pend -= SLHCI_FS_CONST + SLHCI_FS_DATA_TIME(actlen);
2219	}
2220
2221	done:
2222	t->len[ab] = -`1`;
2223	}
2224
2225	static void
2226	slhci_tstart(struct slhci_softc *sc)
2227	{
2228	struct slhci_transfers *t;
2229	struct slhci_pipe *spipe;
2230	int remaining_bustime;
2231
2232	t = &sc->sc_transfers;
2233
2234	KASSERT(mutex_owned(&sc->sc_intr_lock));
2235
2236	if (!(t->flags & (F_AREADY\|F_BREADY)))
2237	return;
2238
2239	if (t->flags & (F_AINPROG\|F_BINPROG\|F_DISABLED))
2240	return;
2241
2242	/*
2243	* We have about 6 us to get from the bus time check to
2244	* starting the transfer or we might babble or the chip might fail to
2245	* signal transfer complete. This leaves no time for any other
2246	* interrupts.
2247	*/
2248	remaining_bustime = (int)(slhci_read(sc, SL811_CSOF)) << `6`;
2249	remaining_bustime -= SLHCI_END_BUSTIME;
2250
2251	/*
2252	* Start one transfer only, clearing any aborted transfers that are
2253	* not yet in progress and skipping missed isoc. It is easier to copy
2254	* & paste most of the A/B sections than to make the logic work
2255	* otherwise and this allows better constant use.
2256	*/
2257	if (t->flags & F_AREADY) {
2258	spipe = t->spipe[A];
2259	if (spipe == NULL) {
2260	t->flags &= ~F_AREADY;
2261	t->len[A] = -`1`;
2262	} else if (remaining_bustime >= spipe->bustime) {
2263	t->flags &= ~(F_AREADY\|F_SOFCHECK1\|F_SOFCHECK2);
2264	t->flags \|= F_AINPROG;
2265	start_cc_time(&t_ab[A], spipe->tregs[LEN]);
2266	slhci_write(sc, SL11_E0CTRL, spipe->control);
2267	goto pend;
2268	}
2269	}
2270	if (t->flags & F_BREADY) {
2271	spipe = t->spipe[B];
2272	if (spipe == NULL) {
2273	t->flags &= ~F_BREADY;
2274	t->len[B] = -`1`;
2275	} else if (remaining_bustime >= spipe->bustime) {
2276	t->flags &= ~(F_BREADY\|F_SOFCHECK1\|F_SOFCHECK2);
2277	t->flags \|= F_BINPROG;
2278	start_cc_time(&t_ab[B], spipe->tregs[LEN]);
2279	slhci_write(sc, SL11_E1CTRL, spipe->control);
2280	pend:
2281	t->pend = spipe->bustime;
2282	}
2283	}
2284	}
2285
2286	static void
2287	slhci_dotransfer(struct slhci_softc *sc)
2288	{
2289	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
2290	struct slhci_transfers *t;
2291	struct slhci_pipe *spipe;
2292	int ab, i;
2293
2294	t = &sc->sc_transfers;
2295
2296	KASSERT(mutex_owned(&sc->sc_intr_lock));
2297
2298	while ((t->len[A] == -`1` \|\| t->len[B] == -`1`) &&
2299	(GOT_FIRST_TIMED_COND(spipe, t, spipe->frame <= t->frame) \|\|
2300	GOT_FIRST_CB(spipe, t))) {
2301	LK_SLASSERT(spipe->xfer != NULL, sc, spipe, NULL, return);
2302	LK_SLASSERT(spipe->ptype != PT_ROOT_CTRL && spipe->ptype !=
2303	PT_ROOT_INTR, sc, spipe, NULL, return);
2304
2305	/ Check that this transfer can fit in the remaining memory. /
2306	if (t->len[A] + t->len[B] + spipe->tregs[LEN] + `1` >
2307	SL11_MAX_PACKET_SIZE) {
2308	DLOG(D_XFER, "Transfer does not fit. alen %d blen %d "
2309	"len %d", t->len[A], t->len[B], spipe->tregs[LEN],
2310	`0`);
2311	return;
2312	}
2313
2314	gcq_remove(&spipe->xq);
2315
2316	if (t->len[A] == -`1`) {
2317	ab = A;
2318	spipe->tregs[ADR] = SL11_BUFFER_START;
2319	} else {
2320	ab = B;
2321	spipe->tregs[ADR] = SL11_BUFFER_END -
2322	spipe->tregs[LEN];
2323	}
2324
2325	t->len[ab] = spipe->tregs[LEN];
2326
2327	if (spipe->tregs[LEN] && (spipe->tregs[PID] & SL11_PID_BITS)
2328	!= SL11_PID_IN) {
2329	start_cc_time(&t_copy_to_dev,
2330	spipe->tregs[LEN]);
2331	slhci_write_multi(sc, spipe->tregs[ADR],
2332	spipe->buffer, spipe->tregs[LEN]);
2333	stop_cc_time(&t_copy_to_dev);
2334	t->pend -= SLHCI_FS_CONST +
2335	SLHCI_FS_DATA_TIME(spipe->tregs[LEN]);
2336	}
2337
2338	DLOG(D_MSG, "NEW TRANSFER AB=%d flags %#x alen %d blen %d",
2339	ab, t->flags, t->len[`0`], t->len[`1`]);
2340
2341	if (spipe->tregs[LEN])
2342	i = `0`;
2343	else
2344	i = `1`;
2345
2346	for (; i <= `3`; i++)
2347	if (t->current_tregs[ab][i] != spipe->tregs[i]) {
2348	t->current_tregs[ab][i] = spipe->tregs[i];
2349	slhci_write(sc, slhci_tregs[ab][i],
2350	spipe->tregs[i]);
2351	}
2352
2353	DLOG(D_SXFER, "Transfer len %d pid %#x dev %d type %d",
2354	spipe->tregs[LEN], spipe->tregs[PID], spipe->tregs[DEV],
2355	spipe->ptype);
2356
2357	t->spipe[ab] = spipe;
2358	t->flags \|= ab ? F_BREADY : F_AREADY;
2359
2360	slhci_tstart(sc);
2361	}
2362	}
2363
2364	/*
2365	* slhci_callback is called after the lock is taken.
2366	*/
2367	static void
2368	slhci_callback(struct slhci_softc *sc)
2369	{
2370	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
2371	struct slhci_transfers *t;
2372	struct slhci_pipe *spipe;
2373	struct usbd_xfer *xfer;
2374
2375	t = &sc->sc_transfers;
2376
2377	KASSERT(mutex_owned(&sc->sc_intr_lock));
2378
2379	DLOG(D_SOFT, "CB flags %#x", t->flags, `0`,`0`,`0`);
2380	for (;;) {
2381	if (__predict_false(t->flags & F_ROOTINTR)) {
2382	t->flags &= ~F_ROOTINTR;
2383	if (t->rootintr != NULL) {
2384	u_char *p;
2385
2386	p = t->rootintr->ux_buf;
2387	p[`0`] = `2`;
2388	t->rootintr->ux_actlen = `1`;
2389	t->rootintr->ux_status = USBD_NORMAL_COMPLETION;
2390	xfer = t->rootintr;
2391	goto do_callback;
2392	}
2393	}
2394
2395
2396	if (!DEQUEUED_CALLBACK(spipe, t))
2397	return;
2398
2399	xfer = spipe->xfer;
2400	LK_SLASSERT(xfer != NULL, sc, spipe, NULL, return);
2401	spipe->xfer = NULL;
2402	DLOG(D_XFER, "xfer callback length %d actlen %d spipe %p "
2403	"type %d", xfer->ux_length, xfer->ux_actlen, spipe,
2404	spipe->ptype);
2405	do_callback:
2406	slhci_do_callback(sc, xfer);
2407	}
2408	}
2409
2410	static void
2411	slhci_enter_xfer(struct slhci_softc sc, struct* slhci_pipe *spipe)
2412	{
2413	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
2414	struct slhci_transfers *t;
2415
2416	t = &sc->sc_transfers;
2417
2418	KASSERT(mutex_owned(&sc->sc_intr_lock));
2419
2420	if (__predict_false(t->flags & F_DISABLED) \|\|
2421	__predict_false(spipe->pflags & PF_GONE)) {
2422	DLOG(D_MSG, "slhci_enter_xfer: DISABLED or GONE", `0`,`0`,`0`,`0`);
2423	spipe->xfer->ux_status = USBD_CANCELLED;
2424	}
2425
2426	if (spipe->xfer->ux_status == USBD_IN_PROGRESS) {
2427	if (spipe->xfer->ux_timeout) {
2428	spipe->to_frame = t->frame + spipe->xfer->ux_timeout;
2429	slhci_xfer_timer(sc, spipe);
2430	}
2431	if (spipe->pipe.up_interval)
2432	slhci_queue_timed(sc, spipe);
2433	else
2434	enter_q(t, spipe, Q_CB);
2435	} else
2436	enter_callback(t, spipe);
2437	}
2438
2439	static void
2440	slhci_enter_xfers(struct slhci_softc *sc)
2441	{
2442	struct slhci_pipe *spipe;
2443
2444	KASSERT(mutex_owned(&sc->sc_intr_lock));
2445
2446	while (DEQUEUED_WAITQ(spipe, sc))
2447	slhci_enter_xfer(sc, spipe);
2448	}
2449
2450	static void
2451	slhci_queue_timed(struct slhci_softc sc, struct* slhci_pipe *spipe)
2452	{
2453	struct slhci_transfers *t;
2454	struct gcq *q;
2455	struct slhci_pipe *spp;
2456
2457	t = &sc->sc_transfers;
2458
2459	KASSERT(mutex_owned(&sc->sc_intr_lock));
2460
2461	FIND_TIMED(q, t, spp, spp->frame > spipe->frame);
2462	gcq_insert_before(q, &spipe->xq);
2463	}
2464
2465	static void
2466	slhci_xfer_timer(struct slhci_softc sc, struct* slhci_pipe *spipe)
2467	{
2468	struct slhci_transfers *t;
2469	struct gcq *q;
2470	struct slhci_pipe *spp;
2471
2472	t = &sc->sc_transfers;
2473
2474	KASSERT(mutex_owned(&sc->sc_intr_lock));
2475
2476	FIND_TO(q, t, spp, spp->to_frame >= spipe->to_frame);
2477	gcq_insert_before(q, &spipe->to);
2478	}
2479
2480	static void
2481	slhci_callback_schedule(struct slhci_softc *sc)
2482	{
2483	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
2484	struct slhci_transfers *t;
2485
2486	t = &sc->sc_transfers;
2487
2488	KASSERT(mutex_owned(&sc->sc_intr_lock));
2489
2490	if (t->flags & F_ACTIVE)
2491	slhci_do_callback_schedule(sc);
2492	}
2493
2494	static void
2495	slhci_do_callback_schedule(struct slhci_softc *sc)
2496	{
2497	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
2498	struct slhci_transfers *t;
2499
2500	t = &sc->sc_transfers;
2501
2502	KASSERT(mutex_owned(&sc->sc_intr_lock));
2503
2504	DLOG(D_MSG, "flags %#x", t->flags, `0`, `0`, `0`);
2505	if (!(t->flags & F_CALLBACK)) {
2506	t->flags \|= F_CALLBACK;
2507	softint_schedule(sc->sc_cb_softintr);
2508	}
2509	}
2510
2511	#if 0
2512	/ must be called with lock taken. /
2513	/ XXX static / void
2514	slhci_pollxfer(struct slhci_softc sc, struct* usbd_xfer *xfer)
2515	{
2516	KASSERT(mutex_owned(&sc->sc_intr_lock));
2517	slhci_dotransfer(sc);
2518	do {
2519	slhci_dointr(sc);
2520	} while (xfer->ux_status == USBD_IN_PROGRESS);
2521	slhci_do_callback(sc, xfer);
2522	}
2523	#endif
2524
2525	static usbd_status
2526	slhci_do_poll(struct slhci_softc sc, struct* slhci_pipe spipe, struct*
2527	usbd_xfer *xfer)
2528	{
2529	slhci_waitintr(sc, `0`);
2530
2531	return USBD_NORMAL_COMPLETION;
2532	}
2533
2534	static usbd_status
2535	slhci_lsvh_warn(struct slhci_softc sc, struct* slhci_pipe spipe, struct*
2536	usbd_xfer *xfer)
2537	{
2538	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
2539	struct slhci_transfers *t;
2540
2541	t = &sc->sc_transfers;
2542
2543	if (!(t->flags & F_LSVH_WARNED)) {
2544	printf("%s: Low speed device via hub disabled, "
2545	"see slhci(4)\n", SC_NAME(sc));
2546	DDOLOG("Low speed device via hub disabled, "
2547	"see slhci(4)", SC_NAME(sc), `0`,`0`,`0`);
2548	t->flags \|= F_LSVH_WARNED;
2549	}
2550	return USBD_INVAL;
2551	}
2552
2553	static usbd_status
2554	slhci_isoc_warn(struct slhci_softc sc, struct* slhci_pipe spipe, struct*
2555	usbd_xfer *xfer)
2556	{
2557	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
2558	struct slhci_transfers *t;
2559
2560	t = &sc->sc_transfers;
2561
2562	if (!(t->flags & F_ISOC_WARNED)) {
2563	printf("%s: ISOC transfer not supported "
2564	"(see slhci(4))\n", SC_NAME(sc));
2565	DDOLOG("ISOC transfer not supported "
2566	"(see slhci(4))", `0`, `0`, `0`, `0`);
2567	t->flags \|= F_ISOC_WARNED;
2568	}
2569	return USBD_INVAL;
2570	}
2571
2572	static usbd_status
2573	slhci_open_pipe(struct slhci_softc sc, struct* slhci_pipe spipe, struct*
2574	usbd_xfer *xfer)
2575	{
2576	struct slhci_transfers *t;
2577	struct usbd_pipe *pipe;
2578
2579	t = &sc->sc_transfers;
2580	pipe = &spipe->pipe;
2581
2582	if (t->flags & F_DISABLED)
2583	return USBD_CANCELLED;
2584	else if (pipe->up_interval && !slhci_reserve_bustime(sc, spipe, `1`))
2585	return USBD_PENDING_REQUESTS;
2586	else {
2587	enter_all_pipes(t, spipe);
2588	return USBD_NORMAL_COMPLETION;
2589	}
2590	}
2591
2592	static usbd_status
2593	slhci_close_pipe(struct slhci_softc sc, struct* slhci_pipe spipe, struct*
2594	usbd_xfer *xfer)
2595	{
2596	struct usbd_pipe *pipe;
2597
2598	pipe = &spipe->pipe;
2599
2600	if (pipe->up_interval && spipe->ptype != PT_ROOT_INTR)
2601	slhci_reserve_bustime(sc, spipe, `0`);
2602	gcq_remove(&spipe->ap);
2603	return USBD_NORMAL_COMPLETION;
2604	}
2605
2606	static usbd_status
2607	slhci_do_abort(struct slhci_softc sc, struct* slhci_pipe spipe, struct*
2608	usbd_xfer *xfer)
2609	{
2610	struct slhci_transfers *t;
2611
2612	t = &sc->sc_transfers;
2613
2614	KASSERT(mutex_owned(&sc->sc_intr_lock));
2615
2616	if (spipe->xfer == xfer) {
2617	if (spipe->ptype == PT_ROOT_INTR) {
2618	if (t->rootintr == spipe->xfer) / XXX assert? /
2619	t->rootintr = NULL;
2620	} else {
2621	gcq_remove(&spipe->to);
2622	gcq_remove(&spipe->xq);
2623
2624	if (t->spipe[A] == spipe) {
2625	t->spipe[A] = NULL;
2626	if (!(t->flags & F_AINPROG))
2627	t->len[A] = -`1`;
2628	} else if (t->spipe[B] == spipe) {
2629	t->spipe[B] = NULL;
2630	if (!(t->flags & F_BINPROG))
2631	t->len[B] = -`1`;
2632	}
2633	}
2634
2635	if (xfer->ux_status != USBD_TIMEOUT) {
2636	spipe->xfer = NULL;
2637	spipe->pipe.up_repeat = `0`; / XXX timeout? /
2638	}
2639	}
2640
2641	return USBD_NORMAL_COMPLETION;
2642	}
2643
2644	/*
2645	* Called to deactivate or stop use of the controller instead of panicking.
2646	* Will cancel the xfer correctly even when not on a list.
2647	*/
2648	static usbd_status
2649	slhci_halt(struct slhci_softc sc, struct* slhci_pipe *spipe,
2650	struct usbd_xfer *xfer)
2651	{
2652	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
2653	struct slhci_transfers *t;
2654
2655	KASSERT(mutex_owned(&sc->sc_intr_lock));
2656
2657	t = &sc->sc_transfers;
2658
2659	DDOLOG("Halt! sc %p spipe %p xfer %p", sc, spipe, xfer, `0`);
2660
2661	if (spipe != NULL)
2662	slhci_log_spipe(spipe);
2663
2664	if (xfer != NULL)
2665	slhci_log_xfer(xfer);
2666
2667	if (spipe != NULL && xfer != NULL && spipe->xfer == xfer &&
2668	!gcq_onlist(&spipe->xq) && t->spipe[A] != spipe && t->spipe[B] !=
2669	spipe) {
2670	xfer->ux_status = USBD_CANCELLED;
2671	enter_callback(t, spipe);
2672	}
2673
2674	if (t->flags & F_ACTIVE) {
2675	slhci_intrchange(sc, `0`);
2676	/*
2677	* leave power on when halting in case flash devices or disks
2678	* are attached, which may be writing and could be damaged
2679	* by abrupt power loss. The root hub clear power feature
2680	* should still work after halting.
2681	*/
2682	}
2683
2684	t->flags &= ~F_ACTIVE;
2685	t->flags \|= F_UDISABLED;
2686	if (!(t->flags & F_NODEV))
2687	t->flags \|= F_NODEV\|F_CCONNECT\|F_ROOTINTR;
2688	slhci_drain(sc);
2689
2690	/ One last callback for the drain and device removal. /
2691	slhci_do_callback_schedule(sc);
2692
2693	return USBD_NORMAL_COMPLETION;
2694	}
2695
2696	/*
2697	* There are three interrupt states: no interrupts during reset and after
2698	* device deactivation, INSERT only for no device present but power on, and
2699	* SOF, INSERT, ADONE, and BDONE when device is present.
2700	*/
2701	static void
2702	slhci_intrchange(struct slhci_softc *sc, uint8_t new_ier)
2703	{
2704	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
2705	KASSERT(mutex_owned(&sc->sc_intr_lock));
2706	if (sc->sc_ier != new_ier) {
2707	DLOG(D_INTR, "New IER %#x", new_ier, `0`, `0`, `0`);
2708	sc->sc_ier = new_ier;
2709	slhci_write(sc, SL11_IER, new_ier);
2710	BSB_SYNC(sc->iot, sc->ioh, sc->pst, sc->psz);
2711	}
2712	}
2713
2714	/*
2715	* Drain: cancel all pending transfers and put them on the callback list and
2716	* set the UDISABLED flag. UDISABLED is cleared only by reset.
2717	*/
2718	static void
2719	slhci_drain(struct slhci_softc *sc)
2720	{
2721	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
2722	struct slhci_transfers *t;
2723	struct slhci_pipe *spipe;
2724	struct gcq *q;
2725	int i;
2726
2727	KASSERT(mutex_owned(&sc->sc_intr_lock));
2728
2729	t = &sc->sc_transfers;
2730
2731	DLOG(D_MSG, "DRAIN flags %#x", t->flags, `0`,`0`,`0`);
2732
2733	t->pend = INT_MAX;
2734
2735	for (i=`0`; i<=`1`; i++) {
2736	t->len[i] = -`1`;
2737	if (t->spipe[i] != NULL) {
2738	enter_callback(t, t->spipe[i]);
2739	t->spipe[i] = NULL;
2740	}
2741	}
2742
2743	/ Merge the queues into the callback queue. /
2744	gcq_merge_tail(&t->q[Q_CALLBACKS], &t->q[Q_CB]);
2745	gcq_merge_tail(&t->q[Q_CALLBACKS], &t->q[Q_NEXT_CB]);
2746	gcq_merge_tail(&t->q[Q_CALLBACKS], &t->timed);
2747
2748	/*
2749	* Cancel all pipes. Note that not all of these may be on the
2750	* callback queue yet; some could be in slhci_start, for example.
2751	*/
2752	FOREACH_AP(q, t, spipe) {
2753	spipe->pflags \|= PF_GONE;
2754	spipe->pipe.up_repeat = `0`;
2755	spipe->pipe.up_aborting = `1`;
2756	if (spipe->xfer != NULL)
2757	spipe->xfer->ux_status = USBD_CANCELLED;
2758	}
2759
2760	gcq_remove_all(&t->to);
2761
2762	t->flags \|= F_UDISABLED;
2763	t->flags &= ~(F_AREADY\|F_BREADY\|F_AINPROG\|F_BINPROG\|F_LOWSPEED);
2764	}
2765
2766	/*
2767	* RESET: SL11_CTRL_RESETENGINE=1 and SL11_CTRL_JKSTATE=0 for 50ms
2768	* reconfigure SOF after reset, must wait 2.5us before USB bus activity (SOF)
2769	* check attached device speed.
2770	* must wait 100ms before USB transaction according to app note, 10ms
2771	* by spec. uhub does this delay
2772	*
2773	* Started from root hub set feature reset, which does step one.
2774	* ub_usepolling will call slhci_reset directly, otherwise the callout goes
2775	* through slhci_reset_entry.
2776	*/
2777	void
2778	slhci_reset(struct slhci_softc *sc)
2779	{
2780	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
2781	struct slhci_transfers *t;
2782	struct slhci_pipe *spipe;
2783	struct gcq *q;
2784	uint8_t r, pol, ctrl;
2785
2786	t = &sc->sc_transfers;
2787	KASSERT(mutex_owned(&sc->sc_intr_lock));
2788
2789	stop_cc_time(&t_delay);
2790
2791	KASSERT(t->flags & F_ACTIVE);
2792
2793	start_cc_time(&t_delay, `0`);
2794	stop_cc_time(&t_delay);
2795
2796	slhci_write(sc, SL11_CTRL, `0`);
2797	start_cc_time(&t_delay, `3`);
2798	DELAY(`3`);
2799	stop_cc_time(&t_delay);
2800	slhci_write(sc, SL11_ISR, `0xff`);
2801
2802	r = slhci_read(sc, SL11_ISR);
2803
2804	if (r & SL11_ISR_INSERT)
2805	slhci_write(sc, SL11_ISR, SL11_ISR_INSERT);
2806
2807	if (r & SL11_ISR_NODEV) {
2808	DLOG(D_MSG, "NC", `0`,`0`,`0`,`0`);
2809	/*
2810	* Normally, the hard interrupt insert routine will issue
2811	* CCONNECT, however we need to do it here if the detach
2812	* happened during reset.
2813	*/
2814	if (!(t->flags & F_NODEV))
2815	t->flags \|= F_CCONNECT\|F_ROOTINTR\|F_NODEV;
2816	slhci_intrchange(sc, SL11_IER_INSERT);
2817	} else {
2818	if (t->flags & F_NODEV)
2819	t->flags \|= F_CCONNECT;
2820	t->flags &= ~(F_NODEV\|F_LOWSPEED);
2821	if (r & SL11_ISR_DATA) {
2822	DLOG(D_MSG, "FS", `0`,`0`,`0`,`0`);
2823	pol = ctrl = `0`;
2824	} else {
2825	DLOG(D_MSG, "LS", `0`,`0`,`0`,`0`);
2826	pol = SL811_CSOF_POLARITY;
2827	ctrl = SL11_CTRL_LOWSPEED;
2828	t->flags \|= F_LOWSPEED;
2829	}
2830
2831	/ Enable SOF auto-generation /
2832	t->frame = `0`; / write to SL811_CSOF will reset frame /
2833	slhci_write(sc, SL11_SOFTIME, `0xe0`);
2834	slhci_write(sc, SL811_CSOF, pol\|SL811_CSOF_MASTER\|`0x2e`);
2835	slhci_write(sc, SL11_CTRL, ctrl\|SL11_CTRL_ENABLESOF);
2836
2837	/*
2838	* According to the app note, ARM must be set
2839	* for SOF generation to work. We initialize all
2840	* USBA registers here for current_tregs.
2841	*/
2842	slhci_write(sc, SL11_E0ADDR, SL11_BUFFER_START);
2843	slhci_write(sc, SL11_E0LEN, `0`);
2844	slhci_write(sc, SL11_E0PID, SL11_PID_SOF);
2845	slhci_write(sc, SL11_E0DEV, `0`);
2846	slhci_write(sc, SL11_E0CTRL, SL11_EPCTRL_ARM);
2847
2848	/*
2849	* Initialize B registers. This can't be done earlier since
2850	* they are not valid until the SL811_CSOF register is written
2851	* above due to SL11H compatability.
2852	*/
2853	slhci_write(sc, SL11_E1ADDR, SL11_BUFFER_END - `8`);
2854	slhci_write(sc, SL11_E1LEN, `0`);
2855	slhci_write(sc, SL11_E1PID, `0`);
2856	slhci_write(sc, SL11_E1DEV, `0`);
2857
2858	t->current_tregs[`0`][ADR] = SL11_BUFFER_START;
2859	t->current_tregs[`0`][LEN] = `0`;
2860	t->current_tregs[`0`][PID] = SL11_PID_SOF;
2861	t->current_tregs[`0`][DEV] = `0`;
2862	t->current_tregs[`1`][ADR] = SL11_BUFFER_END - `8`;
2863	t->current_tregs[`1`][LEN] = `0`;
2864	t->current_tregs[`1`][PID] = `0`;
2865	t->current_tregs[`1`][DEV] = `0`;
2866
2867	/ SOF start will produce USBA interrupt /
2868	t->len[A] = `0`;
2869	t->flags \|= F_AINPROG;
2870
2871	slhci_intrchange(sc, SLHCI_NORMAL_INTERRUPTS);
2872	}
2873
2874	t->flags &= ~(F_UDISABLED\|F_RESET);
2875	t->flags \|= F_CRESET\|F_ROOTINTR;
2876	FOREACH_AP(q, t, spipe) {
2877	spipe->pflags &= ~PF_GONE;
2878	spipe->pipe.up_aborting = `0`;
2879	}
2880	DLOG(D_MSG, "RESET done flags %#x", t->flags, `0`,`0`,`0`);
2881	}
2882
2883
2884	#ifdef SLHCI_DEBUG
2885	static int
2886	slhci_memtest(struct slhci_softc *sc)
2887	{
2888	enum { ASC, DESC, EITHER = ASC }; / direction /
2889	enum { READ, WRITE }; / operation /
2890	const char ptr, elem;
2891	size_t i;
2892	const int low = SL11_BUFFER_START, high = SL11_BUFFER_END;
2893	int addr = `0`, dir = ASC, op = READ;
2894	/ Extended March C- test algorithm (SOFs also) /
2895	const char test[] = "E(w0) A(r0w1r1) A(r1w0r0) D(r0w1) D(r1w0) E(r0)";
2896	char c;
2897	const uint8_t dbs[] = { `0x00`, `0x0f`, `0x33`, `0x55` }; / data backgrounds /
2898	uint8_t db;
2899
2900	/ Perform memory test for all data backgrounds. /
2901	for (i = `0`; i < __arraycount(dbs); i++) {
2902	ptr = test;
2903	elem = ptr;
2904	/ Walk test algorithm string. /
2905	while ((c = *ptr++) != `'\0'`)
2906	switch (tolower((int)c)) {
2907	case `'a'`:
2908	/ Address sequence is in ascending order. /
2909	dir = ASC;
2910	break;
2911	case `'d'`:
2912	/ Address sequence is in descending order. /
2913	dir = DESC;
2914	break;
2915	case `'e'`:
2916	/ Address sequence is in either order. /
2917	dir = EITHER;
2918	break;
2919	case `'('`:
2920	/ Start of test element (sequence). /
2921	elem = ptr;
2922	addr = (dir == ASC) ? low : high;
2923	break;
2924	case `'r'`:
2925	/ read operation /
2926	op = READ;
2927	break;
2928	case `'w'`:
2929	/ write operation /
2930	op = WRITE;
2931	break;
2932	case `'0'`:
2933	case `'1'`:
2934	/*
2935	* Execute previously set-up operation by
2936	* reading/writing non-inverted ('0') or
2937	* inverted ('1') data background.
2938	*/
2939	db = (c - `'0'`) ? ~dbs[i] : dbs[i];
2940	if (op == READ) {
2941	if (slhci_read(sc, addr) != db)
2942	return -`1`;
2943	} else
2944	slhci_write(sc, addr, db);
2945	break;
2946	case `')'`:
2947	/*
2948	* End of element: Repeat same element with next
2949	* address or continue to next element.
2950	*/
2951	addr = (dir == ASC) ? addr + `1` : addr - `1`;
2952	if (addr >= low && addr <= high)
2953	ptr = elem;
2954	break;
2955	default:
2956	/ Do nothing. /
2957	break;
2958	}
2959	}
2960
2961	return `0`;
2962	}
2963	#endif
2964
2965	/ returns 1 if succeeded, 0 if failed, reserve == 0 is unreserve /
2966	static int
2967	slhci_reserve_bustime(struct slhci_softc sc, struct* slhci_pipe spipe, int*
2968	reserve)
2969	{
2970	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
2971	struct slhci_transfers *t;
2972	int bustime, max_packet;
2973
2974	KASSERT(mutex_owned(&sc->sc_intr_lock));
2975
2976	t = &sc->sc_transfers;
2977	max_packet = UGETW(spipe->pipe.up_endpoint->ue_edesc->wMaxPacketSize);
2978
2979	if (spipe->pflags & PF_LS)
2980	bustime = SLHCI_LS_CONST + SLHCI_LS_DATA_TIME(max_packet);
2981	else
2982	bustime = SLHCI_FS_CONST + SLHCI_FS_DATA_TIME(max_packet);
2983
2984	if (!reserve) {
2985	t->reserved_bustime -= bustime;
2986	#ifdef DIAGNOSTIC
2987	if (t->reserved_bustime < `0`) {
2988	printf("%s: reserved_bustime %d < 0!\n",
2989	SC_NAME(sc), t->reserved_bustime);
2990	DDOLOG("reserved_bustime %d < 0!",
2991	t->reserved_bustime, `0`, `0`, `0`);
2992	t->reserved_bustime = `0`;
2993	}
2994	#endif
2995	return `1`;
2996	}
2997
2998	if (t->reserved_bustime + bustime > SLHCI_RESERVED_BUSTIME) {
2999	if (ratecheck(&sc->sc_reserved_warn_rate,
3000	&reserved_warn_rate))
3001	#ifdef SLHCI_NO_OVERTIME
3002	{
3003	printf("%s: Max reserved bus time exceeded! "
3004	"Erroring request.\n", SC_NAME(sc));
3005	DDOLOG("%s: Max reserved bus time exceeded! "
3006	"Erroring request.", `0`, `0`, `0`, `0`);
3007	}
3008	return `0`;
3009	#else
3010	{
3011	printf("%s: Reserved bus time exceeds %d!\n",
3012	SC_NAME(sc), SLHCI_RESERVED_BUSTIME);
3013	DDOLOG("Reserved bus time exceeds %d!",
3014	SLHCI_RESERVED_BUSTIME, `0`, `0`, `0`);
3015	}
3016	#endif
3017	}
3018
3019	t->reserved_bustime += bustime;
3020	return `1`;
3021	}
3022
3023	/ Device insertion/removal interrupt /
3024	static void
3025	slhci_insert(struct slhci_softc *sc)
3026	{
3027	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
3028	struct slhci_transfers *t;
3029
3030	t = &sc->sc_transfers;
3031
3032	KASSERT(mutex_owned(&sc->sc_intr_lock));
3033
3034	if (t->flags & F_NODEV)
3035	slhci_intrchange(sc, `0`);
3036	else {
3037	slhci_drain(sc);
3038	slhci_intrchange(sc, SL11_IER_INSERT);
3039	}
3040	t->flags ^= F_NODEV;
3041	t->flags \|= F_ROOTINTR\|F_CCONNECT;
3042	DLOG(D_MSG, "INSERT intr: flags after %#x", t->flags, `0`,`0`,`0`);
3043	}
3044
3045	/*
3046	* Data structures and routines to emulate the root hub.
3047	*/
3048
3049	static usbd_status
3050	slhci_clear_feature(struct slhci_softc sc, unsigned* int what)
3051	{
3052	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
3053	struct slhci_transfers *t;
3054	usbd_status error;
3055
3056	t = &sc->sc_transfers;
3057	error = USBD_NORMAL_COMPLETION;
3058
3059	KASSERT(mutex_owned(&sc->sc_intr_lock));
3060
3061	if (what == UHF_PORT_POWER) {
3062	DLOG(D_MSG, "POWER_OFF", `0`,`0`,`0`,`0`);
3063	t->flags &= ~F_POWER;
3064	if (!(t->flags & F_NODEV))
3065	t->flags \|= F_NODEV\|F_CCONNECT\|F_ROOTINTR;
3066	/ for x68k Nereid USB controller /
3067	if (sc->sc_enable_power && (t->flags & F_REALPOWER)) {
3068	t->flags &= ~F_REALPOWER;
3069	sc->sc_enable_power(sc, POWER_OFF);
3070	}
3071	slhci_intrchange(sc, `0`);
3072	slhci_drain(sc);
3073	} else if (what == UHF_C_PORT_CONNECTION) {
3074	t->flags &= ~F_CCONNECT;
3075	} else if (what == UHF_C_PORT_RESET) {
3076	t->flags &= ~F_CRESET;
3077	} else if (what == UHF_PORT_ENABLE) {
3078	slhci_drain(sc);
3079	} else if (what != UHF_PORT_SUSPEND) {
3080	DDOLOG("ClrPortFeatERR:value=%#.4x", what, `0`,`0`,`0`);
3081	error = USBD_IOERROR;
3082	}
3083
3084	return error;
3085	}
3086
3087	static usbd_status
3088	slhci_set_feature(struct slhci_softc sc, unsigned* int what)
3089	{
3090	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
3091	struct slhci_transfers *t;
3092	uint8_t r;
3093
3094	t = &sc->sc_transfers;
3095
3096	KASSERT(mutex_owned(&sc->sc_intr_lock));
3097
3098	if (what == UHF_PORT_RESET) {
3099	if (!(t->flags & F_ACTIVE)) {
3100	DDOLOG("SET PORT_RESET when not ACTIVE!",
3101	`0`,`0`,`0`,`0`);
3102	return USBD_INVAL;
3103	}
3104	if (!(t->flags & F_POWER)) {
3105	DDOLOG("SET PORT_RESET without PORT_POWER! flags %p",
3106	t->flags, `0`,`0`,`0`);
3107	return USBD_INVAL;
3108	}
3109	if (t->flags & F_RESET)
3110	return USBD_NORMAL_COMPLETION;
3111	DLOG(D_MSG, "RESET flags %#x", t->flags, `0`,`0`,`0`);
3112	slhci_intrchange(sc, `0`);
3113	slhci_drain(sc);
3114	slhci_write(sc, SL11_CTRL, SL11_CTRL_RESETENGINE);
3115	/ usb spec says delay >= 10ms, app note 50ms /
3116	start_cc_time(&t_delay, `50000`);
3117	if (sc->sc_bus.ub_usepolling) {
3118	DELAY(`50000`);
3119	slhci_reset(sc);
3120	} else {
3121	t->flags \|= F_RESET;
3122	callout_schedule(&sc->sc_timer, max(mstohz(`50`), `2`));
3123	}
3124	} else if (what == UHF_PORT_SUSPEND) {
3125	printf("%s: USB Suspend not implemented!\n", SC_NAME(sc));
3126	DDOLOG("USB Suspend not implemented!", `0`, `0`, `0`, `0`);
3127	} else if (what == UHF_PORT_POWER) {
3128	DLOG(D_MSG, "PORT_POWER", `0`,`0`,`0`,`0`);
3129	/ for x68k Nereid USB controller /
3130	if (!(t->flags & F_ACTIVE))
3131	return USBD_INVAL;
3132	if (t->flags & F_POWER)
3133	return USBD_NORMAL_COMPLETION;
3134	if (!(t->flags & F_REALPOWER)) {
3135	if (sc->sc_enable_power)
3136	sc->sc_enable_power(sc, POWER_ON);
3137	t->flags \|= F_REALPOWER;
3138	}
3139	t->flags \|= F_POWER;
3140	r = slhci_read(sc, SL11_ISR);
3141	if (r & SL11_ISR_INSERT)
3142	slhci_write(sc, SL11_ISR, SL11_ISR_INSERT);
3143	if (r & SL11_ISR_NODEV) {
3144	slhci_intrchange(sc, SL11_IER_INSERT);
3145	t->flags \|= F_NODEV;
3146	} else {
3147	t->flags &= ~F_NODEV;
3148	t->flags \|= F_CCONNECT\|F_ROOTINTR;
3149	}
3150	} else {
3151	DDOLOG("SetPortFeatERR=%#.8x", what, `0`,`0`,`0`);
3152	return USBD_IOERROR;
3153	}
3154
3155	return USBD_NORMAL_COMPLETION;
3156	}
3157
3158	static void
3159	slhci_get_status(struct slhci_softc sc, usb_port_status_t ps)
3160	{
3161	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
3162	struct slhci_transfers *t;
3163	unsigned int status, change;
3164
3165	t = &sc->sc_transfers;
3166
3167	KASSERT(mutex_owned(&sc->sc_intr_lock));
3168
3169	/*
3170	* We do not have a way to detect over current or babble and
3171	* suspend is currently not implemented, so connect and reset
3172	* are the only changes that need to be reported.
3173	*/
3174	change = `0`;
3175	if (t->flags & F_CCONNECT)
3176	change \|= UPS_C_CONNECT_STATUS;
3177	if (t->flags & F_CRESET)
3178	change \|= UPS_C_PORT_RESET;
3179
3180	status = `0`;
3181	if (!(t->flags & F_NODEV))
3182	status \|= UPS_CURRENT_CONNECT_STATUS;
3183	if (!(t->flags & F_UDISABLED))
3184	status \|= UPS_PORT_ENABLED;
3185	if (t->flags & F_RESET)
3186	status \|= UPS_RESET;
3187	if (t->flags & F_POWER)
3188	status \|= UPS_PORT_POWER;
3189	if (t->flags & F_LOWSPEED)
3190	status \|= UPS_LOW_SPEED;
3191	USETW(ps->wPortStatus, status);
3192	USETW(ps->wPortChange, change);
3193	DLOG(D_ROOT, "status=%#.4x, change=%#.4x", status, change, `0`,`0`);
3194	}
3195
3196	static int
3197	slhci_roothub_ctrl(struct usbd_bus bus, usb_device_request_t req,
3198	void buf, int* buflen)
3199	{
3200	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
3201	struct slhci_softc *sc = SLHCI_BUS2SC(bus);
3202	struct slhci_transfers *t = &sc->sc_transfers;
3203	usbd_status error = USBD_IOERROR; / XXX should be STALL /
3204	uint16_t len, value, index;
3205	uint8_t type;
3206	int actlen = `0`;
3207
3208	len = UGETW(req->wLength);
3209	value = UGETW(req->wValue);
3210	index = UGETW(req->wIndex);
3211
3212	type = req->bmRequestType;
3213
3214	SLHCI_DEXEC(D_TRACE, slhci_log_req(req));
3215
3216	/*
3217	* USB requests for hubs have two basic types, standard and class.
3218	* Each could potentially have recipients of device, interface,
3219	* endpoint, or other. For the hub class, CLASS_OTHER means the port
3220	* and CLASS_DEVICE means the hub. For standard requests, OTHER
3221	* is not used. Standard request are described in section 9.4 of the
3222	* standard, hub class requests in 11.16. Each request is either read
3223	* or write.
3224	*
3225	* Clear Feature, Set Feature, and Status are defined for each of the
3226	* used recipients. Get Descriptor and Set Descriptor are defined for
3227	* both standard and hub class types with different descriptors.
3228	* Other requests have only one defined recipient and type. These
3229	* include: Get/Set Address, Get/Set Configuration, Get/Set Interface,
3230	* and Synch Frame for standard requests and Get Bus State for hub
3231	* class.
3232	*
3233	* When a device is first powered up it has address 0 until the
3234	* address is set.
3235	*
3236	* Hubs are only allowed to support one interface and may not have
3237	* isochronous endpoints. The results of the related requests are
3238	* undefined.
3239	*
3240	* The standard requires invalid or unsupported requests to return
3241	* STALL in the data stage, however this does not work well with
3242	* current error handling. XXX
3243	*
3244	* Some unsupported fields:
3245	* Clear Hub Feature is for C_HUB_LOCAL_POWER and C_HUB_OVER_CURRENT
3246	* Set Device Features is for ENDPOINT_HALT and DEVICE_REMOTE_WAKEUP
3247	* Get Bus State is optional sample of D- and D+ at EOF2
3248	*/
3249
3250	switch (req->bRequest) {
3251	/ Write Requests /
3252	case UR_CLEAR_FEATURE:
3253	if (type == UT_WRITE_CLASS_OTHER) {
3254	if (index == `1` / Port /) {
3255	mutex_enter(&sc->sc_intr_lock);
3256	error = slhci_clear_feature(sc, value);
3257	mutex_exit(&sc->sc_intr_lock);
3258	} else
3259	DLOG(D_ROOT, "Clear Port Feature "
3260	"index = %#.4x", index, `0`,`0`,`0`);
3261	}
3262	break;
3263	case UR_SET_FEATURE:
3264	if (type == UT_WRITE_CLASS_OTHER) {
3265	if (index == `1` / Port /) {
3266	mutex_enter(&sc->sc_intr_lock);
3267	error = slhci_set_feature(sc, value);
3268	mutex_exit(&sc->sc_intr_lock);
3269	} else
3270	DLOG(D_ROOT, "Set Port Feature "
3271	"index = %#.4x", index, `0`,`0`,`0`);
3272	} else if (type != UT_WRITE_CLASS_DEVICE)
3273	DLOG(D_ROOT, "Set Device Feature "
3274	"ENDPOINT_HALT or DEVICE_REMOTE_WAKEUP "
3275	"not supported", `0`,`0`,`0`,`0`);
3276	break;
3277
3278	/ Read Requests /
3279	case UR_GET_STATUS:
3280	if (type == UT_READ_CLASS_OTHER) {
3281	if (index == `1` / Port / && len == / XXX >=? /
3282	sizeof(usb_port_status_t)) {
3283	mutex_enter(&sc->sc_intr_lock);
3284	slhci_get_status(sc, (usb_port_status_t *)
3285	buf);
3286	mutex_exit(&sc->sc_intr_lock);
3287	actlen = sizeof(usb_port_status_t);
3288	error = USBD_NORMAL_COMPLETION;
3289	} else
3290	DLOG(D_ROOT, "Get Port Status index = %#.4x "
3291	"len = %#.4x", index, len, `0`,`0`);
3292	} else if (type == UT_READ_CLASS_DEVICE) { / XXX index? /
3293	if (len == sizeof(usb_hub_status_t)) {
3294	DLOG(D_ROOT, "Get Hub Status",
3295	`0`,`0`,`0`,`0`);
3296	actlen = sizeof(usb_hub_status_t);
3297	memset(buf, `0`, actlen);
3298	error = USBD_NORMAL_COMPLETION;
3299	} else
3300	DLOG(D_ROOT, "Get Hub Status bad len %#.4x",
3301	len, `0`,`0`,`0`);
3302	}
3303	break;
3304	case UR_GET_DESCRIPTOR:
3305	if (type == UT_READ_DEVICE) {
3306	/ value is type (&0xff00) and index (0xff) /
3307	if (value == (UDESC_DEVICE<<`8`)) {
3308	usb_device_descriptor_t devd;
3309
3310	actlen = min(buflen, sizeof(devd));
3311	memcpy(&devd, buf, actlen);
3312	USETW(devd.idVendor, USB_VENDOR_SCANLOGIC);
3313	memcpy(buf, &devd, actlen);
3314	error = USBD_NORMAL_COMPLETION;
3315	} else if (value == (UDESC_CONFIG<<`8`)) {
3316	struct usb_roothub_descriptors confd;
3317
3318	actlen = min(buflen, sizeof(confd));
3319	memcpy(&confd, buf, actlen);
3320
3321	/ 2 mA units /
3322	confd.urh_confd.bMaxPower = t->max_current;
3323	memcpy(buf, &confd, actlen);
3324	error = USBD_NORMAL_COMPLETION;
3325	} else if (value == ((UDESC_STRING<<`8`)\|`1`)) {
3326	/ Vendor /
3327	actlen = usb_makestrdesc((usb_string_descriptor_t *)
3328	buf, len, "ScanLogic/Cypress");
3329	error = USBD_NORMAL_COMPLETION;
3330	} else if (value == ((UDESC_STRING<<`8`)\|`2`)) {
3331	/ Product /
3332	actlen = usb_makestrdesc((usb_string_descriptor_t *)
3333	buf, len, "SL811HS/T root hub");
3334	error = USBD_NORMAL_COMPLETION;
3335	} else
3336	DDOLOG("Unknown Get Descriptor %#.4x",
3337	value, `0`,`0`,`0`);
3338	} else if (type == UT_READ_CLASS_DEVICE) {
3339	/ Descriptor number is 0 /
3340	if (value == (UDESC_HUB<<`8`)) {
3341	usb_hub_descriptor_t hubd;
3342
3343	actlen = min(buflen, sizeof(hubd));
3344	memcpy(&hubd, buf, actlen);
3345	hubd.bHubContrCurrent =
3346	`500` - t->max_current;
3347	memcpy(buf, &hubd, actlen);
3348	error = USBD_NORMAL_COMPLETION;
3349	} else
3350	DDOLOG("Unknown Get Hub Descriptor %#.4x",
3351	value, `0`,`0`,`0`);
3352	}
3353	break;
3354	default:
3355	/ default from usbroothub /
3356	return buflen;
3357	}
3358
3359	if (error == USBD_NORMAL_COMPLETION)
3360	return actlen;
3361
3362	return -`1`;
3363	}
3364
3365	/ End in lock functions. Start debug functions. /
3366
3367	#ifdef SLHCI_DEBUG
3368	void
3369	slhci_log_buffer(struct usbd_xfer *xfer)
3370	{
3371	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
3372	u_char *buf;
3373
3374	if(xfer->ux_length > `0` &&
3375	UE_GET_DIR(xfer->ux_pipe->up_endpoint->ue_edesc->bEndpointAddress) ==
3376	UE_DIR_IN) {
3377	buf = xfer->ux_buf;
3378	DDOLOGBUF(buf, xfer->ux_actlen);
3379	DDOLOG("len %d actlen %d short %d", xfer->ux_length,
3380	xfer->ux_actlen, xfer->ux_length - xfer->ux_actlen, `0`);
3381	}
3382	}
3383
3384	void
3385	slhci_log_req(usb_device_request_t *r)
3386	{
3387	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
3388	int req, type, value, index, len;
3389
3390	req = r->bRequest;
3391	type = r->bmRequestType;
3392	value = UGETW(r->wValue);
3393	index = UGETW(r->wIndex);
3394	len = UGETW(r->wLength);
3395
3396	DDOLOG("request: type %#x", type, `0`, `0`, `0`);
3397	DDOLOG("request: r=%d,v=%d,i=%d,l=%d ", req, value, index, len);
3398	}
3399
3400	void
3401	slhci_log_dumpreg(void)
3402	{
3403	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
3404	uint8_t r;
3405	unsigned int aaddr, alen, baddr, blen;
3406	static u_char buf[`240`];
3407
3408	r = slhci_read(ssc, SL11_E0CTRL);
3409	DDOLOG("USB A Host Control = %#.2x", r, `0`, `0`, `0`);
3410	DDOLOGEPCTRL(r);
3411
3412	aaddr = slhci_read(ssc, SL11_E0ADDR);
3413	DDOLOG("USB A Base Address = %u", aaddr, `0`,`0`,`0`);
3414	alen = slhci_read(ssc, SL11_E0LEN);
3415	DDOLOG("USB A Length = %u", alen, `0`,`0`,`0`);
3416	r = slhci_read(ssc, SL11_E0STAT);
3417	DDOLOG("USB A Status = %#.2x", r, `0`,`0`,`0`);
3418	DDOLOGEPSTAT(r);
3419
3420	r = slhci_read(ssc, SL11_E0CONT);
3421	DDOLOG("USB A Remaining or Overflow Length = %u", r, `0`,`0`,`0`);
3422	r = slhci_read(ssc, SL11_E1CTRL);
3423	DDOLOG("USB B Host Control = %#.2x", r, `0`,`0`,`0`);
3424	DDOLOGEPCTRL(r);
3425
3426	baddr = slhci_read(ssc, SL11_E1ADDR);
3427	DDOLOG("USB B Base Address = %u", baddr, `0`,`0`,`0`);
3428	blen = slhci_read(ssc, SL11_E1LEN);
3429	DDOLOG("USB B Length = %u", blen, `0`,`0`,`0`);
3430	r = slhci_read(ssc, SL11_E1STAT);
3431	DDOLOG("USB B Status = %#.2x", r, `0`,`0`,`0`);
3432	DDOLOGEPSTAT(r);
3433
3434	r = slhci_read(ssc, SL11_E1CONT);
3435	DDOLOG("USB B Remaining or Overflow Length = %u", r, `0`,`0`,`0`);
3436
3437	r = slhci_read(ssc, SL11_CTRL);
3438	DDOLOG("Control = %#.2x", r, `0`,`0`,`0`);
3439	DDOLOGCTRL(r);
3440
3441	r = slhci_read(ssc, SL11_IER);
3442	DDOLOG("Interrupt Enable = %#.2x", r, `0`,`0`,`0`);
3443	DDOLOGIER(r);
3444
3445	r = slhci_read(ssc, SL11_ISR);
3446	DDOLOG("Interrupt Status = %#.2x", r, `0`,`0`,`0`);
3447	DDOLOGISR(r);
3448
3449	r = slhci_read(ssc, SL11_REV);
3450	DDOLOG("Revision = %#.2x", r, `0`,`0`,`0`);
3451	r = slhci_read(ssc, SL811_CSOF);
3452	DDOLOG("SOF Counter = %#.2x", r, `0`,`0`,`0`);
3453
3454	if (alen && aaddr >= SL11_BUFFER_START && aaddr < SL11_BUFFER_END &&
3455	alen <= SL11_MAX_PACKET_SIZE && aaddr + alen <= SL11_BUFFER_END) {
3456	slhci_read_multi(ssc, aaddr, buf, alen);
3457	DDOLOG("USBA Buffer: start %u len %u", aaddr, alen, `0`,`0`);
3458	DDOLOGBUF(buf, alen);
3459	} else if (alen)
3460	DDOLOG("USBA Buffer Invalid", `0`,`0`,`0`,`0`);
3461
3462	if (blen && baddr >= SL11_BUFFER_START && baddr < SL11_BUFFER_END &&
3463	blen <= SL11_MAX_PACKET_SIZE && baddr + blen <= SL11_BUFFER_END) {
3464	slhci_read_multi(ssc, baddr, buf, blen);
3465	DDOLOG("USBB Buffer: start %u len %u", baddr, blen, `0`,`0`);
3466	DDOLOGBUF(buf, blen);
3467	} else if (blen)
3468	DDOLOG("USBB Buffer Invalid", `0`,`0`,`0`,`0`);
3469	}
3470
3471	void
3472	slhci_log_xfer(struct usbd_xfer *xfer)
3473	{
3474	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
3475	DDOLOG("xfer: length=%u, actlen=%u, flags=%#x, timeout=%u,",
3476	xfer->ux_length, xfer->ux_actlen, xfer->ux_flags, xfer->ux_timeout);
3477	DDOLOG("buffer=%p", xfer->ux_buf, `0`,`0`,`0`);
3478	slhci_log_req(&xfer->ux_request);
3479	}
3480
3481	void
3482	slhci_log_spipe(struct slhci_pipe *spipe)
3483	{
3484	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
3485	DDOLOG("spipe %p onlists: AP=%d TO=%d XQ=%d", spipe,
3486	gcq_onlist(&spipe->ap) ? `1` : `0`,
3487	gcq_onlist(&spipe->to) ? `1` : `0`,
3488	gcq_onlist(&spipe->xq) ? `1` : `0`);
3489	DDOLOG("spipe: xfer %p buffer %p pflags %#x ptype %d",
3490	spipe->xfer, spipe->buffer, spipe->pflags, spipe->ptype);
3491	}
3492
3493	void
3494	slhci_print_intr(void)
3495	{
3496	unsigned int ier, isr;
3497	ier = slhci_read(ssc, SL11_IER);
3498	isr = slhci_read(ssc, SL11_ISR);
3499	printf("IER: %#x ISR: %#x \n", ier, isr);
3500	}
3501
3502	#if 0
3503	void
3504	slhci_log_sc(void)
3505	{
3506	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
3507
3508	struct slhci_transfers *t;
3509	int i;
3510
3511	t = &ssc->sc_transfers;
3512
3513	DDOLOG("Flags=%#x", t->flags, `0`,`0`,`0`);
3514	DDOLOG("a = %p Alen=%d b = %p Blen=%d", t->spipe[`0`], t->len[`0`],
3515	t->spipe[`1`], t->len[`1`]);
3516
3517	for (i=`0`; i<=Q_MAX; i++)
3518	DDOLOG("Q %d: %p", i, gcq_hq(&t->q[i]), `0`,`0`);
3519
3520	DDOLOG("TIMED: %p", GCQ_ITEM(gcq_hq(&t->to),
3521	struct slhci_pipe, to), `0`,`0`,`0`);
3522
3523	DDOLOG("frame=%d rootintr=%p", t->frame, t->rootintr, `0`,`0`);
3524
3525	DDOLOG("ub_usepolling=%d", ssc->sc_bus.ub_usepolling, `0`, `0`, `0`);
3526	}
3527
3528	void
3529	slhci_log_slreq(struct slhci_pipe *r)
3530	{
3531	SLHCIHIST_FUNC(); SLHCIHIST_CALLED();
3532	DDOLOG("xfer: %p", r->xfer, `0`,`0`,`0`);
3533	DDOLOG("buffer: %p", r->buffer, `0`,`0`,`0`);
3534	DDOLOG("bustime: %u", r->bustime, `0`,`0`,`0`);
3535	DDOLOG("control: %#x", r->control, `0`,`0`,`0`);
3536	DDOLOGEPCTRL(r->control);
3537
3538	DDOLOG("pid: %#x", r->tregs[PID], `0`,`0`,`0`);
3539	DDOLOG("dev: %u", r->tregs[DEV], `0`,`0`,`0`);
3540	DDOLOG("len: %u", r->tregs[LEN], `0`,`0`,`0`);
3541
3542	if (r->xfer)
3543	slhci_log_xfer(r->xfer);
3544	}
3545	#endif
3546	#endif /* SLHCI_DEBUG */
3547	/ End debug functions. /
3548

Browse the source code of src/src/sys/dev/ic/sl811hs.c