1/* $NetBSD: midwayvar.h,v 1.19 2012/10/27 17:18:21 chs Exp $ */
2
3/*
4 * Copyright (c) 1996 Charles D. Cranor and Washington University.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28/*
29 * m i d w a y v a r . h
30 *
31 * we define the en_softc here so that bus specific modules can allocate
32 * it as the first item in their softc. note that BSD-required
33 * device_t is in the mid_softc!
34 *
35 * author: Chuck Cranor <chuck@netbsd>
36 */
37
38/*
39 * params needed to determine softc size
40 */
41
42#ifndef EN_NTX
43#define EN_NTX 8 /* number of tx bufs to use */
44#endif
45#ifndef EN_TXSZ
46#define EN_TXSZ 32 /* transmit buf size in KB */
47#endif
48#ifndef EN_RXSZ
49#define EN_RXSZ 32 /* recv buf size in KB */
50#endif
51#define EN_MAXNRX ((2048-(EN_NTX*EN_TXSZ))/EN_RXSZ)
52 /* largest possible NRX (depends on RAM size) */
53
54
55#if defined(__NetBSD__) || defined(__OpenBSD__) || defined(__bsdi__)
56#define EN_INTR_TYPE int
57#define EN_INTR_RET(X) return(X)
58#if defined(__NetBSD__) || defined(__OpenBSD__)
59#define EN_IOCTL_CMDT u_long
60#elif defined(__bsdi__)
61#define EN_IOCTL_CMDT int
62#endif
63
64#elif defined(__FreeBSD__)
65
66#define EN_INTR_TYPE void
67#define EN_INTR_RET(X) return
68#define EN_IOCTL_CMDT int
69
70struct device {
71 char dv_xname[IFNAMSIZ];
72};
73
74#define DV_IFNET 1
75
76struct cfdriver {
77 int zero;
78 char *name;
79 int one;
80 int cd_ndevs;
81 void *cd_devs[NEN];
82};
83
84#endif
85
86#if 1 /* for ATM_PVCEXT */
87#include <sys/queue.h>
88
89/* round-robin scheduler */
90struct rrp {
91 struct rrp *next;
92 struct ifnet *ifp;
93 int nref;
94};
95#endif
96
97/*
98 * softc
99 */
100
101struct en_softc {
102 /* bsd glue */
103 device_t sc_dev; /* system device */
104 struct ifnet enif; /* network ifnet handle */
105
106 /* bus glue */
107 bus_space_tag_t en_memt; /* for EN_READ/EN_WRITE */
108 bus_space_handle_t en_base; /* base of en card */
109 bus_size_t en_obmemsz; /* size of en card (bytes) */
110 void (*en_busreset)(void *);
111 /* bus specific reset function */
112
113 /* serv list */
114 u_int32_t hwslistp; /* hw pointer to service list (byte offset) */
115 u_int16_t swslist[MID_SL_N]; /* software service list (see en_service()) */
116 u_int16_t swsl_head, /* ends of swslist (index into swslist) */
117 swsl_tail;
118 u_int32_t swsl_size; /* # of items in swsl */
119
120
121 /* xmit DMA */
122 u_int32_t dtq[MID_DTQ_N]; /* sw copy of DMA q (see ENIDQ macros) */
123 u_int32_t dtq_free; /* # of dtq's free */
124 u_int32_t dtq_us; /* software copy of our pointer (byte offset) */
125 u_int32_t dtq_chip; /* chip's pointer (byte offset) */
126 u_int32_t need_dtqs; /* true if we ran out of DTQs */
127
128 /* recv DMA */
129 u_int32_t drq[MID_DRQ_N]; /* sw copy of DMA q (see ENIDQ macros) */
130 u_int32_t drq_free; /* # of drq's free */
131 u_int32_t drq_us; /* software copy of our pointer (byte offset) */
132 u_int32_t drq_chip; /* chip's pointer (byte offset) */
133 u_int32_t need_drqs; /* true if we ran out of DRQs */
134
135 /* xmit buf ctrl. (per channel) */
136 struct {
137 u_int32_t mbsize; /* # mbuf bytes we are using (max=TXHIWAT) */
138 u_int32_t bfree; /* # free bytes in buffer (not DMA or xmit) */
139 u_int32_t start, stop; /* ends of buffer area (byte offset) */
140 u_int32_t cur; /* next free area (byte offset) */
141 u_int32_t nref; /* # of VCs using this channel */
142 struct ifqueue indma; /* mbufs being DMA'd now */
143 struct ifqueue q; /* mbufs waiting for DMA now */
144 } txslot[MID_NTX_CH];
145
146 /* xmit vc ctrl. (per vc) */
147 u_int8_t txspeed[MID_N_VC]; /* speed of tx on a VC */
148 u_int8_t txvc2slot[MID_N_VC]; /* map VC to slot */
149
150#if 1 /* for ATM_PVCEXT */
151 struct rrp *txrrp; /* round-robin pointer to ifnet */
152#endif
153
154 /* recv vc ctrl. (per vc). maps VC number to recv slot */
155 u_int16_t rxvc2slot[MID_N_VC];
156 int en_nrx; /* # of active rx slots */
157
158 /* recv buf ctrl. (per recv slot) */
159 struct {
160 void *rxhand; /* recv. handle if doing direct delivery */
161 u_int32_t mode; /* saved copy of mode info */
162 u_int32_t start, stop; /* ends of my buffer area */
163 u_int32_t cur; /* where I am at */
164 u_int16_t atm_vci; /* backpointer to VCI */
165 u_int8_t atm_flags; /* copy of atm_flags from atm_ph */
166 u_int8_t oth_flags; /* other flags */
167 u_int32_t raw_threshold; /* for raw mode */
168 struct ifqueue indma; /* mbufs being DMA'd now */
169 struct ifqueue q; /* mbufs waiting for DMA now */
170 } rxslot[EN_MAXNRX]; /* recv info */
171
172 u_int8_t macaddr[6]; /* card unique mac address */
173
174 /* stats */
175 u_int32_t vtrash; /* sw copy of counter */
176 u_int32_t otrash; /* sw copy of counter */
177 u_int32_t ttrash; /* # of RBD's with T bit set */
178 u_int32_t mfix; /* # of times we had to call mfix */
179 u_int32_t mfixfail; /* # of times mfix failed */
180 u_int32_t headbyte; /* # of times we used BYTE DMA at front */
181 u_int32_t tailbyte; /* # of times we used BYTE DMA at end */
182 u_int32_t tailflush; /* # of times we had to FLUSH out DMA bytes */
183 u_int32_t txmbovr; /* # of times we dropped due to mbsize */
184 u_int32_t dmaovr; /* tx DMA overflow count */
185 u_int32_t txoutspace; /* out of space in xmit buffer */
186 u_int32_t txdtqout; /* out of DTQs */
187 u_int32_t launch; /* total # of launches */
188 u_int32_t lheader; /* # of launches without OB header */
189 u_int32_t ltail; /* # of launches without OB tail */
190 u_int32_t hwpull; /* # of pulls off hardware service list */
191 u_int32_t swadd; /* # of pushes on sw service list */
192 u_int32_t rxqnotus; /* # of times we pull from rx q, but fail */
193 u_int32_t rxqus; /* # of good pulls from rx q */
194 u_int32_t rxoutboth; /* # of times out of mbufs and DRQs */
195 u_int32_t rxdrqout; /* # of times out of DRQs */
196 u_int32_t rxmbufout; /* # of time out of mbufs */
197
198 /* random stuff */
199 u_int32_t ipl; /* sbus interrupt lvl (1 on pci?) */
200 u_int8_t bestburstcode; /* code of best burst we can use */
201 u_int8_t bestburstlen; /* length of best burst (bytes) */
202 u_int8_t bestburstshift; /* (x >> shift) == (x / bestburstlen) */
203 u_int8_t bestburstmask; /* bits to check if not multiple of burst */
204 u_int8_t alburst; /* align DMA bursts? */
205 u_int8_t is_adaptec; /* adaptec version of midway? */
206
207#if 1 /* for ATM_PVCEXT */
208 LIST_HEAD(sif_list, pvcsif) sif_list; /* pvc subinterface list */
209#endif
210};
211
212/*
213 * exported functions
214 */
215
216void en_attach(struct en_softc *);
217EN_INTR_TYPE en_intr(void *);
218void en_reset(struct en_softc *);
219