diff -r dad770520906 external/gpl3/gcc/dist/gcc/config/m68k/m68k.md
--- a/external/gpl3/gcc/dist/gcc/config/m68k/m68k.md Sun Nov 24 19:41:18 2024 +0000
+++ b/external/gpl3/gcc/dist/gcc/config/m68k/m68k.md Sat Nov 30 19:00:27 2024 +1100
@@ -1214,18 +1214,18 @@
if (FP_REG_P (operands[0]))
{
if (FP_REG_P (operands[1]))
- return "f%$move%.x %1,%0";
+ return "nop; f%$move%.x %1,%0";
else if (ADDRESS_REG_P (operands[1]))
return "move%.l %1,%-\;f%$move%.s %+,%0";
else if (GET_CODE (operands[1]) == CONST_DOUBLE)
return output_move_const_single (operands);
- return "f%$move%.s %f1,%0";
+ return "nop; f%$move%.s %f1,%0";
}
if (FP_REG_P (operands[1]))
{
if (ADDRESS_REG_P (operands[0]))
- return "fmove%.s %1,%-\;move%.l %+,%0";
- return "fmove%.s %f1,%0";
+ return "nop; fmove%.s %1,%-\;move%.l %+,%0";
+ return "nop; fmove%.s %f1,%0";
}
if (operands[1] == CONST0_RTX (SFmode)
/* clr insns on 68000 read before writing. */
@@ -1362,18 +1362,18 @@
if (FP_REG_P (operands[0]))
{
if (FP_REG_P (operands[1]))
- return "f%&move%.x %1,%0";
+ return "nop; f%&move%.x %1,%0";
if (REG_P (operands[1]))
{
rtx xoperands[2];
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn ("move%.l %1,%-", xoperands);
output_asm_insn ("move%.l %1,%-", operands);
- return "f%&move%.d %+,%0";
+ return "nop; f%&move%.d %+,%0";
}
if (GET_CODE (operands[1]) == CONST_DOUBLE)
return output_move_const_double (operands);
- return "f%&move%.d %f1,%0";
+ return "nop; f%&move%.d %f1,%0";
}
else if (FP_REG_P (operands[1]))
{
@@ -1384,7 +1384,7 @@
return "move%.l %+,%0";
}
else
- return "fmove%.d %f1,%0";
+ return "nop; fmove%.d %f1,%0";
}
return output_move_double (operands);
}
@@ -1480,7 +1480,7 @@
if (FP_REG_P (operands[0]))
{
if (FP_REG_P (operands[1]))
- return "fmove%.x %1,%0";
+ return "nop; fmove%.x %1,%0";
if (REG_P (operands[1]))
{
rtx xoperands[2];
@@ -1489,24 +1489,24 @@
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn ("move%.l %1,%-", xoperands);
output_asm_insn ("move%.l %1,%-", operands);
- return "fmove%.x %+,%0";
+ return "nop; fmove%.x %+,%0";
}
if (GET_CODE (operands[1]) == CONST_DOUBLE)
- return "fmove%.x %1,%0";
- return "fmove%.x %f1,%0";
+ return "nop; fmove%.x %1,%0";
+ return "nop; fmove%.x %f1,%0";
}
if (FP_REG_P (operands[1]))
{
if (REG_P (operands[0]))
{
- output_asm_insn ("fmove%.x %f1,%-\;move%.l %+,%0", operands);
+ output_asm_insn ("nop; fmove%.x %f1,%-\;move%.l %+,%0", operands);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
output_asm_insn ("move%.l %+,%0", operands);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return "move%.l %+,%0";
}
/* Must be memory destination. */
- return "fmove%.x %f1,%0";
+ return "nop; fmove%.x %f1,%0";
}
return output_move_double (operands);
}
@@ -1520,7 +1520,7 @@
if (FP_REG_P (operands[0]))
{
if (FP_REG_P (operands[1]))
- return "fmove%.x %1,%0";
+ return "nop; fmove%.x %1,%0";
if (REG_P (operands[1]))
{
rtx xoperands[2];
@@ -1529,24 +1529,24 @@
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn ("move%.l %1,%-", xoperands);
output_asm_insn ("move%.l %1,%-", operands);
- return "fmove%.x %+,%0";
+ return "nop; fmove%.x %+,%0";
}
if (GET_CODE (operands[1]) == CONST_DOUBLE)
- return "fmove%.x %1,%0";
- return "fmove%.x %f1,%0";
+ return "nop; fmove%.x %1,%0";
+ return "nop; fmove%.x %f1,%0";
}
if (FP_REG_P (operands[1]))
{
if (REG_P (operands[0]))
{
- output_asm_insn ("fmove%.x %f1,%-\;move%.l %+,%0", operands);
+ output_asm_insn ("nop; fmove%.x %f1,%-\;move%.l %+,%0", operands);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
output_asm_insn ("move%.l %+,%0", operands);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return "move%.l %+,%0";
}
else
- return "fmove%.x %f1,%0";
+ return "nop; fmove%.x %f1,%0";
}
return output_move_double (operands);
})
@@ -1578,29 +1578,29 @@
if (FP_REG_P (operands[0]))
{
if (FP_REG_P (operands[1]))
- return "fmove%.x %1,%0";
+ return "nop; fmove%.x %1,%0";
if (REG_P (operands[1]))
{
rtx xoperands[2];
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn ("move%.l %1,%-", xoperands);
output_asm_insn ("move%.l %1,%-", operands);
- return "fmove%.d %+,%0";
+ return "nop; fmove%.d %+,%0";
}
if (GET_CODE (operands[1]) == CONST_DOUBLE)
return output_move_const_double (operands);
- return "fmove%.d %f1,%0";
+ return "nop; fmove%.d %f1,%0";
}
else if (FP_REG_P (operands[1]))
{
if (REG_P (operands[0]))
{
- output_asm_insn ("fmove%.d %f1,%-\;move%.l %+,%0", operands);
+ output_asm_insn ("nop; fmove%.d %f1,%-\;move%.l %+,%0", operands);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return "move%.l %+,%0";
}
else
- return "fmove%.d %f1,%0";
+ return "nop; fmove%.d %f1,%0";
}
return output_move_double (operands);
})
@@ -2018,17 +2018,17 @@
/* Extending float to double in an fp-reg is a no-op. */
return "";
}
- return "f%&move%.x %1,%0";
+ return "nop; f%&move%.x %1,%0";
}
if (FP_REG_P (operands[0]))
- return "f%&move%.s %f1,%0";
+ return "nop; f%&move%.s %f1,%0";
if (DATA_REG_P (operands[0]) && FP_REG_P (operands[1]))
{
- output_asm_insn ("fmove%.d %f1,%-\;move%.l %+,%0", operands);
+ output_asm_insn ("nop; fmove%.d %f1,%-\;move%.l %+,%0", operands);
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return "move%.l %+,%0";
}
- return "fmove%.d %f1,%0";
+ return "nop; fmove%.d %f1,%0";
})
(define_insn "extendsfdf2_cf"
@@ -2066,8 +2066,8 @@
"TARGET_68881 && TARGET_68040"
{
if (FP_REG_P (operands[1]))
- return "f%$move%.x %1,%0";
- return "f%$move%.d %f1,%0";
+ return "nop; f%$move%.x %1,%0";
+ return "nop; f%$move%.d %f1,%0";
})
(define_insn "truncdfsf2_cf"
@@ -2171,7 +2171,7 @@
(clobber (match_scratch:SI 3 "=d"))]
"TARGET_68881 && TUNE_68040"
{
- return "fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\;fmovem%.l %3,%!\;fmove%.l %1,%0\;fmovem%.l %2,%!";
+ return "nop; fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\; nop; fmovem%.l %3,%!\; nop; fmove%.l %1,%0\; nop; fmovem%.l %2,%!";
})
(define_insn "fix_truncdfhi2"
@@ -2181,7 +2181,7 @@
(clobber (match_scratch:SI 3 "=d"))]
"TARGET_68881 && TUNE_68040"
{
- return "fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\;fmovem%.l %3,%!\;fmove%.w %1,%0\;fmovem%.l %2,%!";
+ return "nop; fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\; nop; fmovem%.l %3,%!\; nop; fmove%.w %1,%0\; nop; fmovem%.l %2,%!";
})
(define_insn "fix_truncdfqi2"
@@ -2191,7 +2191,7 @@
(clobber (match_scratch:SI 3 "=d"))]
"TARGET_68881 && TUNE_68040"
{
- return "fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\;fmovem%.l %3,%!\;fmove%.b %1,%0\;fmovem%.l %2,%!";
+ return "nop; fmovem%.l %!,%2\;moveq #16,%3\;or%.l %2,%3\;and%.w #-33,%3\; nop; fmovem%.l %3,%!\; nop; fmove%.b %1,%0\; nop; fmovem%.l %2,%!";
})
;; Convert a float to a float whose value is an integer.
@@ -2209,8 +2209,8 @@
"TARGET_68881 && !TUNE_68040"
{
if (FP_REG_P (operands[1]))
- return "fintrz%.x %f1,%0";
- return "fintrz%.<FP:prec> %f1,%0";
+ return "nop; fintrz%.x %f1,%0";
+ return "nop; fintrz%.<FP:prec> %f1,%0";
}
[(set_attr "type" "falu")])
@@ -2805,7 +2805,7 @@
(plus:FP (float:FP (match_operand:SI 2 "general_operand" "dmi"))
(match_operand:FP 1 "general_operand" "0")))]
"TARGET_68881"
- "f<FP:round>add%.l %2,%0"
+ "nop; f<FP:round>add%.l %2,%0"
[(set_attr "type" "falu")
(set_attr "opy" "2")])
@@ -2814,7 +2814,7 @@
(plus:FP (float:FP (match_operand:HI 2 "general_operand" "dmn"))
(match_operand:FP 1 "general_operand" "0")))]
"TARGET_68881"
- "f<FP:round>add%.w %2,%0"
+ "nop; f<FP:round>add%.w %2,%0"
[(set_attr "type" "falu")
(set_attr "opy" "2")])
@@ -2823,7 +2823,7 @@
(plus:FP (float:FP (match_operand:QI 2 "general_operand" "dmn"))
(match_operand:FP 1 "general_operand" "0")))]
"TARGET_68881"
- "f<FP:round>add%.b %2,%0"
+ "nop; f<FP:round>add%.b %2,%0"
[(set_attr "type" "falu")
(set_attr "opy" "2")])
@@ -2834,8 +2834,8 @@
"TARGET_68881"
{
if (FP_REG_P (operands[2]))
- return "f<FP:round>add%.x %2,%0";
- return "f<FP:round>add%.<FP:prec> %f2,%0";
+ return "nop; f<FP:round>add%.x %2,%0";
+ return "nop; f<FP:round>add%.<FP:prec> %f2,%0";
}
[(set_attr "type" "falu")
(set_attr "opy" "2")])
@@ -3036,7 +3036,7 @@
(minus:FP (match_operand:FP 1 "general_operand" "0")
(float:FP (match_operand:SI 2 "general_operand" "dmi"))))]
"TARGET_68881"
- "f<FP:round>sub%.l %2,%0"
+ "nop; f<FP:round>sub%.l %2,%0"
[(set_attr "type" "falu")
(set_attr "opy" "2")])
@@ -3045,7 +3045,7 @@
(minus:FP (match_operand:FP 1 "general_operand" "0")
(float:FP (match_operand:HI 2 "general_operand" "dmn"))))]
"TARGET_68881"
- "f<FP:round>sub%.w %2,%0"
+ "nop; f<FP:round>sub%.w %2,%0"
[(set_attr "type" "falu")
(set_attr "opy" "2")])
@@ -3054,7 +3054,7 @@
(minus:FP (match_operand:FP 1 "general_operand" "0")
(float:FP (match_operand:QI 2 "general_operand" "dmn"))))]
"TARGET_68881"
- "f<FP:round>sub%.b %2,%0"
+ "nop; f<FP:round>sub%.b %2,%0"
[(set_attr "type" "falu")
(set_attr "opy" "2")])
@@ -3065,8 +3065,8 @@
"TARGET_68881"
{
if (FP_REG_P (operands[2]))
- return "f<FP:round>sub%.x %2,%0";
- return "f<FP:round>sub%.<FP:prec> %f2,%0";
+ return "nop; f<FP:round>sub%.x %2,%0";
+ return "nop; f<FP:round>sub%.<FP:prec> %f2,%0";
}
[(set_attr "type" "falu")
(set_attr "opy" "2")])
@@ -3353,8 +3353,8 @@
"TARGET_68881"
{
return TARGET_68040
- ? "f<FP:round>mul%.l %2,%0"
- : "f<FP:round_mul>mul%.l %2,%0";
+ ? "nop; f<FP:round>mul%.l %2,%0"
+ : "nop; f<FP:round_mul>mul%.l %2,%0";
}
[(set_attr "type" "fmul")
(set_attr "opy" "2")])
@@ -3366,8 +3366,8 @@
"TARGET_68881"
{
return TARGET_68040
- ? "f<FP:round>mul%.w %2,%0"
- : "f<FP:round_mul>mul%.w %2,%0";
+ ? "nop; f<FP:round>mul%.w %2,%0"
+ : "nop; f<FP:round_mul>mul%.w %2,%0";
}
[(set_attr "type" "fmul")
(set_attr "opy" "2")])
@@ -3379,8 +3379,8 @@
"TARGET_68881"
{
return TARGET_68040
- ? "f<FP:round>mul%.b %2,%0"
- : "f<FP:round_mul>mul%.b %2,%0";
+ ? "nop; f<FP:round>mul%.b %2,%0"
+ : "nop; f<FP:round_mul>mul%.b %2,%0";
}
[(set_attr "type" "fmul")
(set_attr "opy" "2")])
@@ -3396,11 +3396,11 @@
{
int i = floating_exact_log2 (operands[2]);
operands[2] = GEN_INT (i);
- return "fscale%.l %2,%0";
+ return "nop; fscale%.l %2,%0";
}
if (REG_P (operands[2]))
- return "f%&mul%.x %2,%0";
- return "f%&mul%.d %f2,%0";
+ return "nop; f%&mul%.x %2,%0";
+ return "nop; f%&mul%.d %f2,%0";
})
(define_insn "mulsf_68881"
@@ -3411,11 +3411,11 @@
{
if (FP_REG_P (operands[2]))
return (TARGET_68040
- ? "fsmul%.x %2,%0"
- : "fsglmul%.x %2,%0");
+ ? "nop; fsmul%.x %2,%0"
+ : "nop; fsglmul%.x %2,%0");
return (TARGET_68040
- ? "fsmul%.s %f2,%0"
- : "fsglmul%.s %f2,%0");
+ ? "nop; fsmul%.s %f2,%0"
+ : "nop; fsglmul%.s %f2,%0");
})
(define_insn "mulxf3_68881"
@@ -3424,7 +3424,7 @@
(match_operand:XF 2 "nonimmediate_operand" "fm")))]
"TARGET_68881"
{
- return "fmul%.x %f2,%0";
+ return "nop; fmul%.x %f2,%0";
})
(define_insn "fmul<mode>3_cf"
@@ -3434,8 +3434,8 @@
"TARGET_COLDFIRE_FPU"
{
if (FP_REG_P (operands[2]))
- return "f<FP:prec>mul%.d %2,%0";
- return "f<FP:prec>mul%.<FP:prec> %2,%0";
+ return "nop; f<FP:prec>mul%.d %2,%0";
+ return "nop; f<FP:prec>mul%.<FP:prec> %2,%0";
}
[(set_attr "type" "fmul")
(set_attr "opy" "2")])
@@ -3456,8 +3456,8 @@
"TARGET_68881"
{
return TARGET_68040
- ? "f<FP:round>div%.l %2,%0"
- : "f<FP:round_mul>div%.l %2,%0";
+ ? "nop; f<FP:round>div%.l %2,%0"
+ : "nop; f<FP:round_mul>div%.l %2,%0";
})
(define_insn "div<mode>3_floathi_68881"
@@ -3467,8 +3467,8 @@
"TARGET_68881"
{
return TARGET_68040
- ? "f<FP:round>div%.w %2,%0"
- : "f<FP:round_mul>div%.w %2,%0";
+ ? "nop; f<FP:round>div%.w %2,%0"
+ : "nop; f<FP:round_mul>div%.w %2,%0";
})
(define_insn "div<mode>3_floatqi_68881"
@@ -3478,8 +3478,8 @@
"TARGET_68881"
{
return TARGET_68040
- ? "f<FP:round>div%.b %2,%0"
- : "f<FP:round_mul>div%.b %2,%0";
+ ? "nop; f<FP:round>div%.b %2,%0"
+ : "nop; f<FP:round_mul>div%.b %2,%0";
})
(define_insn "div<mode>3_68881"
@@ -3490,11 +3490,11 @@
{
if (FP_REG_P (operands[2]))
return (TARGET_68040
- ? "f<FP:round>div%.x %2,%0"
- : "f<FP:round_mul>div%.x %2,%0");
+ ? "nop; f<FP:round>div%.x %2,%0"
+ : "nop; f<FP:round_mul>div%.x %2,%0");
return (TARGET_68040
- ? "f<FP:round>div%.<FP:prec> %f2,%0"
- : "f<FP:round_mul>div%.<FP:prec> %f2,%0");
+ ? "nop; f<FP:round>div%.<FP:prec> %f2,%0"
+ : "nop; f<FP:round_mul>div%.<FP:prec> %f2,%0");
})
(define_insn "div<mode>3_cf"
@@ -3504,8 +3504,8 @@
"TARGET_COLDFIRE_FPU"
{
if (FP_REG_P (operands[2]))
- return "f<FP:prec>div%.d %2,%0";
- return "f<FP:prec>div%.<FP:prec> %2,%0";
+ return "nop; f<FP:prec>div%.d %2,%0";
+ return "nop; f<FP:prec>div%.<FP:prec> %2,%0";
}
[(set_attr "type" "fdiv")
(set_attr "opy" "2")])
@@ -4150,8 +4150,8 @@
return "bchg %1,%0";
}
if (FP_REG_P (operands[1]))
- return "f<FP:round>neg%.x %1,%0";
- return "f<FP:round>neg%.<FP:prec> %f1,%0";
+ return "nop; f<FP:round>neg%.x %1,%0";
+ return "nop; f<FP:round>neg%.<FP:prec> %f1,%0";
})
(define_insn "neg<mode>2_cf"
@@ -4183,8 +4183,8 @@
"TARGET_68881"
{
if (FP_REG_P (operands[1]))
- return "f<FP:round>sqrt%.x %1,%0";
- return "f<FP:round>sqrt%.<FP:prec> %1,%0";
+ return "nop; f<FP:round>sqrt%.x %1,%0";
+ return "nop; f<FP:round>sqrt%.<FP:prec> %1,%0";
}
[(set_attr "type" "fsqrt")])
@@ -4303,8 +4303,8 @@
return "bclr %1,%0";
}
if (FP_REG_P (operands[1]))
- return "f<FP:round>abs%.x %1,%0";
- return "f<FP:round>abs%.<FP:prec> %f1,%0";
+ return "nop; f<FP:round>abs%.x %1,%0";
+ return "nop; f<FP:round>abs%.<FP:prec> %f1,%0";
})
(define_insn "abs<mode>2_cf"
@@ -4318,8 +4318,8 @@
return "bclr %1,%0";
}
if (FP_REG_P (operands[1]))
- return "f<FP:prec>abs%.d %1,%0";
- return "f<FP:prec>abs%.<FP:prec> %1,%0";
+ return "nop; f<FP:prec>abs%.d %1,%0";
+ return "nop; f<FP:prec>abs%.<FP:prec> %1,%0";
}
[(set_attr "type" "bitrw,fneg")])
@@ -6529,19 +6529,19 @@
/* Extending float to double in an fp-reg is a no-op. */
return "";
}
- return "f%$move%.x %1,%0";
+ return "nop; f%$move%.x %1,%0";
}
if (FP_REG_P (operands[0]))
{
if (FP_REG_P (operands[1]))
- return "f%$move%.x %1,%0";
+ return "nop; f%$move%.x %1,%0";
else if (ADDRESS_REG_P (operands[1]))
return "move%.l %1,%-\;f%$move%.s %+,%0";
else if (GET_CODE (operands[1]) == CONST_DOUBLE)
return output_move_const_single (operands);
- return "f%$move%.s %f1,%0";
+ return "nop; f%$move%.s %f1,%0";
}
- return "fmove%.x %f1,%0";
+ return "nop; fmove%.x %f1,%0";
})
@@ -6558,7 +6558,7 @@
/* Extending float to double in an fp-reg is a no-op. */
return "";
}
- return "fmove%.x %1,%0";
+ return "nop; fmove%.x %1,%0";
}
if (FP_REG_P (operands[0]))
{
@@ -6568,13 +6568,13 @@
xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
output_asm_insn ("move%.l %1,%-", xoperands);
output_asm_insn ("move%.l %1,%-", operands);
- return "f%&move%.d %+,%0";
+ return "nop; f%&move%.d %+,%0";
}
if (GET_CODE (operands[1]) == CONST_DOUBLE)
return output_move_const_double (operands);
- return "f%&move%.d %f1,%0";
+ return "nop; f%&move%.d %f1,%0";
}
- return "fmove%.x %f1,%0";
+ return "nop; fmove%.x %f1,%0";
})
(define_insn "truncxfdf2"
@@ -6589,7 +6589,7 @@
operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
return "move%.l %+,%0";
}
- return "fmove%.d %f1,%0";
+ return "nop; fmove%.d %f1,%0";
})
(define_insn "truncxfsf2"
@@ -6597,7 +6597,7 @@
(float_truncate:SF
(match_operand:XF 1 "general_operand" "f")))]
"TARGET_68881"
- "fmove%.s %f1,%0")
+ "nop; fmove%.s %f1,%0")
(define_insn "sin<mode>2"
[(set (match_operand:FP 0 "nonimmediate_operand" "=f")
@@ -6606,9 +6606,9 @@
"TARGET_68881 && flag_unsafe_math_optimizations"
{
if (FP_REG_P (operands[1]))
- return "fsin%.x %1,%0";
+ return "nop; fsin%.x %1,%0";
else
- return "fsin%.<FP:prec> %1,%0";
+ return "nop; fsin%.<FP:prec> %1,%0";
})
(define_insn "cos<mode>2"
@@ -6618,9 +6618,9 @@
"TARGET_68881 && flag_unsafe_math_optimizations"
{
if (FP_REG_P (operands[1]))
- return "fcos%.x %1,%0";
+ return "nop; fcos%.x %1,%0";
else
- return "fcos%.<FP:prec> %1,%0";
+ return "nop; fcos%.<FP:prec> %1,%0";
})
;; Unconditional traps are assumed to have const_true_rtx for the condition.
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/adddf3.S
--- a/lib/libc/arch/m68k/hardfloat/adddf3.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/adddf3.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,9 +45,12 @@
/* double + double */
ENTRY(__adddf3)
+ nop
fmoved 4(%sp),%fp0
+ nop
faddd 12(%sp),%fp0
#ifndef __SVR4_ABI__
+ nop
fmoved %fp0,-(%sp)
movel (%sp)+,%d0
movel (%sp)+,%d1
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/addsf3.S
--- a/lib/libc/arch/m68k/hardfloat/addsf3.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/addsf3.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,9 +45,12 @@
/* single + single */
ENTRY(__addsf3)
+ nop
fmoves 4(%sp),%fp0
+ nop
fadds 8(%sp),%fp0
#ifndef __SVR4_ABI__
+ nop
fmoves %fp0,%d0
#endif
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/cmpdf2.S
--- a/lib/libc/arch/m68k/hardfloat/cmpdf2.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/cmpdf2.S Sat Nov 30 19:00:27 2024 +1100
@@ -47,13 +47,17 @@
/* double < double: -1 */
/* double == double: 0 */
ENTRY(__cmpdf2)
+ nop
fmoved 4(%sp),%fp0
+ nop
fcmpd 12(%sp),%fp0
+ nop
fbgt Lbgt
#ifdef __mcoldfire__
fbeq Lbeq
movql #-1,%d0
#else
+ nop
fslt %d0
extbl %d0
#endif
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/cmpsf2.S
--- a/lib/libc/arch/m68k/hardfloat/cmpsf2.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/cmpsf2.S Sat Nov 30 19:00:27 2024 +1100
@@ -47,13 +47,17 @@
/* single < single: -1 */
/* single == single: 0 */
ENTRY(__cmpsf2)
+ nop
fmoves 4(%sp),%fp0
+ nop
fcmps 8(%sp),%fp0
+ nop
fbgt Lbgt
#ifdef __mcoldfire__
fbeq Lbeq
movql #-1,%d0
#else
+ nop
fslt %d0
extbl %d0
#endif
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/divdf3.S
--- a/lib/libc/arch/m68k/hardfloat/divdf3.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/divdf3.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,9 +45,12 @@
/* double / double */
ENTRY(__divdf3)
+ nop
fmoved 4(%sp),%fp0
+ nop
fdivd 12(%sp),%fp0
#ifndef __SVR4_ABI__
+ nop
fmoved %fp0,-(%sp)
movel (%sp)+,%d0
movel (%sp)+,%d1
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/divsf3.S
--- a/lib/libc/arch/m68k/hardfloat/divsf3.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/divsf3.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,9 +45,12 @@
/* single / single */
ENTRY(__divsf3)
+ nop
fmoves 4(%sp),%fp0
+ nop
fdivs 8(%sp),%fp0
#ifndef __SVR4_ABI__
+ nop
fmoves %fp0,%d0
#endif
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/extendsfdf2.S
--- a/lib/libc/arch/m68k/hardfloat/extendsfdf2.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/extendsfdf2.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,8 +45,10 @@
/* (double) float */
ENTRY(__extendsfdf2)
+ nop
fmoves 4(%sp),%fp0
#ifndef __SVR4_ABI__
+ nop
fmoved %fp0,-(%sp)
movel (%sp)+,%d0
movel (%sp)+,%d1
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/fixdfsi.S
--- a/lib/libc/arch/m68k/hardfloat/fixdfsi.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/fixdfsi.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,7 +45,9 @@
/* (int) double */
ENTRY(__fixdfsi)
+ nop
fintrzd 4(%sp),%fp0
+ nop
fmovel %fp0,%d0
rts
END(__fixdfsi)
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/fixunsdfsi.S
--- a/lib/libc/arch/m68k/hardfloat/fixunsdfsi.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/fixunsdfsi.S Sat Nov 30 19:00:27 2024 +1100
@@ -51,24 +51,31 @@ L2G: .double 0r2147483648.0
/* (unsigned) double */
ENTRY(__fixunsdfsi)
+ nop
fintrzd 4(%sp),%fp0
#ifdef __mcoldfire__
LEA_LCL(L2G,%a0)
fmoved (%a0),%fp1
fcmpd %fp1,%fp0
#else
+ nop
fmoved #0r2147483648.0,%fp1
+ nop
fcmpx %fp1,%fp0
#endif
+ nop
fbge Lwaybig
+ nop
fmovel %fp0,%d0
rts
Lwaybig:
#ifdef __mcoldfire__
fsubd %fp1,%fp0
#else
+ nop
fsubx %fp1,%fp0
#endif
+ nop
fmovel %fp0,%d0
bset #31,%d0
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/fixunssfsi.S
--- a/lib/libc/arch/m68k/hardfloat/fixunssfsi.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/fixunssfsi.S Sat Nov 30 19:00:27 2024 +1100
@@ -51,24 +51,31 @@ L2G: .double 0r2147483648.0
/* single -> unsigned */
ENTRY(__fixunssfsi)
+ nop
fintrzs 4(%sp),%fp0
#ifdef __mcoldfire__
LEA_LCL(L2G,%a0)
fmoved (%a0),%fp1
fcmpd %fp1,%fp0
#else
+ nop
fmoved #0r2147483648.0,%fp1
+ nop
fcmpx %fp1,%fp0
#endif
+ nop
fbge Lwaybig
+ nop
fmovel %fp0,%d0
rts
Lwaybig:
#ifdef __mcoldfire__
fsubd %fp1,%fp0
#else
+ nop
fsubx %fp1,%fp0
#endif
+ nop
fmovel %fp0,%d0
bset #31,%d0
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/floatsidf.S
--- a/lib/libc/arch/m68k/hardfloat/floatsidf.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/floatsidf.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,8 +45,10 @@
/* (double) int */
ENTRY(__floatsidf)
+ nop
fmovel 4(%sp),%fp0
#ifndef __SVR4_ABI__
+ nop
fmoved %fp0,-(%sp)
movel (%sp)+,%d0
movel (%sp)+,%d1
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/floatunsidf.S
--- a/lib/libc/arch/m68k/hardfloat/floatunsidf.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/floatunsidf.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,6 +45,7 @@ L2G: .double 0r2147483648.0
ENTRY(__floatunsidf)
movl 4(%sp),%d0
jpl 1f
+ nop
fmovel %d0,%fp0
#ifdef __SVR4_ABI__
rts
@@ -53,15 +54,18 @@ ENTRY(__floatunsidf)
#endif
1:
bclr #31,%d0
+ nop
fmovel %d0,%fp0
#ifdef __mcoldfire__
LEA_LCL(L2G,%a0)
faddd (%a0),%fp0
#else
+ nop
faddd #0r2147483648.0,%fp0
#endif
#ifndef __SVR4_ABI__
Lret:
+ nop
fmoved %fp0,-(%sp)
movel (%sp)+,%d0
movel (%sp)+,%d1
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/floatunsisf.S
--- a/lib/libc/arch/m68k/hardfloat/floatunsisf.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/floatunsisf.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,21 +45,26 @@ L2G: .double 0r2147483648.0
ENTRY(__floatunsisf)
movl 4(%sp),%d0
jpl 1f
+ nop
fmovel %d0,%fp0
#ifndef __SVR4_ABI__
+ nop
fmoves %fp0,%d0
#endif
rts
1:
bclr #31,%d0
+ nop
fmovel %d0,%fp0
#ifdef __mcoldfire__
LEA_LCL(L2G,%a0)
faddd (%a0),%fp0
#else
+ nop
faddd #0r2147483648.0,%fp0
#endif
#ifndef __SVR4_ABI__
+ nop
fmoves %fp0,%d0
#endif
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/ledf2.S
--- a/lib/libc/arch/m68k/hardfloat/ledf2.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/ledf2.S Sat Nov 30 19:00:27 2024 +1100
@@ -44,8 +44,11 @@ STRONG_ALIAS(__gtdf2,__ledf2)
/* libgcc1.c says a > b */
/* libgcc1.c says 1 - (a <= b) */
ENTRY(__ledf2)
+ nop
fmoved 4(%sp),%fp0
+ nop
fcmpd 12(%sp),%fp0
+ nop
fbgt Lbgt
movql #1,%d0
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/lesf2.S
--- a/lib/libc/arch/m68k/hardfloat/lesf2.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/lesf2.S Sat Nov 30 19:00:27 2024 +1100
@@ -44,8 +44,11 @@ STRONG_ALIAS(__gtsf2,__lesf2)
/* libgcc1.c says a > b */
/* libgcc1.c says 1 - (a <= b) */
ENTRY(__lesf2)
+ nop
fmoves 4(%sp),%fp0
+ nop
fcmps 8(%sp),%fp0
+ nop
fbgt Lbgt
movql #1,%d0
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/ltdf2.S
--- a/lib/libc/arch/m68k/hardfloat/ltdf2.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/ltdf2.S Sat Nov 30 19:00:27 2024 +1100
@@ -44,8 +44,11 @@ STRONG_ALIAS(__gedf2,__ltdf2)
/* libgcc1.c says (a >= b) - 1 */
/* libgcc1.c says -(a < b) */
ENTRY(__ltdf2)
+ nop
fmoved 4(%sp),%fp0
+ nop
fcmpd 12(%sp),%fp0
+ nop
fbge Lbge
movql #-1,%d0
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/ltsf2.S
--- a/lib/libc/arch/m68k/hardfloat/ltsf2.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/ltsf2.S Sat Nov 30 19:00:27 2024 +1100
@@ -44,8 +44,11 @@ STRONG_ALIAS(__gesf2,__ltsf2)
/* libgcc1.c says (a >= b) - 1 */
/* libgcc1.c says -(a < b) */
ENTRY(__ltsf2)
+ nop
fmoves 4(%sp),%fp0
+ nop
fcmps 8(%sp),%fp0
+ nop
fbge Lbge
movql #-1,%d0
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/modf.S
--- a/lib/libc/arch/m68k/hardfloat/modf.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/modf.S Sat Nov 30 19:00:27 2024 +1100
@@ -48,20 +48,25 @@
* returns: xxx and n (in *iptr) where val == n.xxx
*/
ENTRY(modf)
+ nop
fmoved 4(%sp),%fp0
movel 12(%sp),%a0
#ifdef __mcoldfire__
fintrzd %fp0,%fp1
#else
+ nop
fintrzx %fp0,%fp1
#endif
+ nop
fmoved %fp1,(%a0)
#ifdef __mcoldfire__
fsubd %fp1,%fp0
#else
+ nop
fsubx %fp1,%fp0
#endif
#ifndef __SVR4_ABI__
+ nop
fmoved %fp0,-(%sp)
movel (%sp)+,%d0
movel (%sp)+,%d1
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/muldf3.S
--- a/lib/libc/arch/m68k/hardfloat/muldf3.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/muldf3.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,9 +45,12 @@
/* double * double */
ENTRY(__muldf3)
+ nop
fmoved 4(%sp),%fp0
+ nop
fmuld 12(%sp),%fp0
#ifndef __SVR4_ABI__
+ nop
fmoved %fp0,-(%sp)
movel (%sp)+,%d0
movel (%sp)+,%d1
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/mulsf3.S
--- a/lib/libc/arch/m68k/hardfloat/mulsf3.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/mulsf3.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,9 +45,12 @@
/* single * single */
ENTRY(__mulsf3)
+ nop
fmoves 4(%sp),%fp0
+ nop
fmuls 8(%sp),%fp0
#ifndef __SVR4_ABI__
+ nop
fmoves %fp0,%d0
#endif
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/nedf2.S
--- a/lib/libc/arch/m68k/hardfloat/nedf2.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/nedf2.S Sat Nov 30 19:00:27 2024 +1100
@@ -44,8 +44,11 @@ STRONG_ALIAS(__eqdf2,__nedf2)
/* single != single: 1 */
/* single == single: 0 */
ENTRY(__nedf2)
+ nop
fmoved 4(%sp),%fp0
+ nop
fcmpd 12(%sp),%fp0
+ nop
fbeq Lbeq
movql #1,%d0
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/nesf2.S
--- a/lib/libc/arch/m68k/hardfloat/nesf2.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/nesf2.S Sat Nov 30 19:00:27 2024 +1100
@@ -44,8 +44,11 @@ STRONG_ALIAS(__eqsf2,__nesf2)
/* single != single: 1 */
/* single == single: 0 */
ENTRY(__nesf2)
+ nop
fmoves 4(%sp),%fp0
+ nop
fcmps 8(%sp),%fp0
+ nop
fbeq Lbeq
movql #1,%d0
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/subdf3.S
--- a/lib/libc/arch/m68k/hardfloat/subdf3.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/subdf3.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,9 +45,12 @@
/* double - double */
ENTRY(__subdf3)
+ nop
fmoved 4(%sp),%fp0
+ nop
fsubd 12(%sp),%fp0
#ifndef __SVR4_ABI__
+ nop
fmoved %fp0,-(%sp)
movel (%sp)+,%d0
movel (%sp)+,%d1
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/subsf3.S
--- a/lib/libc/arch/m68k/hardfloat/subsf3.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/subsf3.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,9 +45,12 @@
/* single - single */
ENTRY(__subsf3)
+ nop
fmoves 4(%sp),%fp0
+ nop
fsubs 8(%sp),%fp0
#ifndef __SVR4_ABI__
+ nop
fmoves %fp0,%d0
#endif
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/truncdfsf2.S
--- a/lib/libc/arch/m68k/hardfloat/truncdfsf2.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/truncdfsf2.S Sat Nov 30 19:00:27 2024 +1100
@@ -45,8 +45,10 @@
/* (float) double */
ENTRY(__truncdfsf2)
+ nop
fmoved 4(%sp),%fp0
#ifndef __SVR4_ABI__
+ nop
fmoves %fp0,%d0
#endif
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/unorddf2.S
--- a/lib/libc/arch/m68k/hardfloat/unorddf2.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/unorddf2.S Sat Nov 30 19:00:27 2024 +1100
@@ -41,8 +41,11 @@ RCSID("$NetBSD: unorddf2.S,v 1.2 2014/03
/* libgcc1.c says 0 if both are ordered */
ENTRY(__unordsf2)
+ nop
fmoves 4(%sp),%fp0
+ nop
fcmps 8(%sp),%fp0
+ nop
fbor Lbor
movql #1,%d0
rts
diff -r dad770520906 lib/libc/arch/m68k/hardfloat/unordsf2.S
--- a/lib/libc/arch/m68k/hardfloat/unordsf2.S Sun Nov 24 19:41:18 2024 +0000
+++ b/lib/libc/arch/m68k/hardfloat/unordsf2.S Sat Nov 30 19:00:27 2024 +1100
@@ -42,8 +42,11 @@ RCSID("$NetBSD: unordsf2.S,v 1.2 2014/03
/* libgcc1.c says (a >= b) - 1 */
/* libgcc1.c says -(a < b) */
ENTRY(__unorddf2)
+ nop
fmoved 4(%sp),%fp0
+ nop
fcmpd 12(%sp),%fp0
+ nop
fbor Lbor
movql #1,%d0
rts
diff -r dad770520906 sys/arch/m68k/include/fenv.h
--- a/sys/arch/m68k/include/fenv.h Sun Nov 24 19:41:18 2024 +0000
+++ b/sys/arch/m68k/include/fenv.h Sat Nov 30 19:00:27 2024 +1100
@@ -75,38 +75,38 @@ typedef struct {
#define FE_DFL_ENV ((fenv_t *) -1)
#define __get_fpcr(__fpcr) \
- __asm__ __volatile__ ("fmove%.l %!,%0" : "=dm" (__fpcr))
+ __asm__ __volatile__ ("nop; fmove%.l %!,%0" : "=dm" (__fpcr))
#define __set_fpcr(__fpcr) \
- __asm__ __volatile__ ("fmove%.l %0,%!" : : "dm" (__fpcr))
+ __asm__ __volatile__ ("nop; fmove%.l %0,%!" : : "dm" (__fpcr))
#define __get_fpsr(__fpsr) \
- __asm__ __volatile__ ("fmove%.l %/fpsr,%0" : "=dm" (__fpsr))
+ __asm__ __volatile__ ("nop; fmove%.l %/fpsr,%0" : "=dm" (__fpsr))
#define __set_fpsr(__fpsr) \
- __asm__ __volatile__ ("fmove%.l %0,%/fpsr" : : "dm" (__fpsr))
+ __asm__ __volatile__ ("nop; fmove%.l %0,%/fpsr" : : "dm" (__fpsr))
#define __fmul(__s, __t, __d) \
do { \
__t d = __d; \
- __asm__ __volatile__ ("fmul" __s "; fnop" : "=f" (d) : "0" (d)); \
+ __asm__ __volatile__ ("nop; fmul" __s "; nop; fnop" : "=f" (d) : "0" (d)); \
} while (/*CONSTCOND*/0)
#define __fdiv(__s, __t, __d) \
do { \
__t d = __d; \
- __asm__ __volatile__ ("fdiv" __s "; fnop" : "=f" (d) : "0" (d)); \
+ __asm__ __volatile__ ("nop; fdiv" __s "; nop; fnop" : "=f" (d) : "0" (d)); \
} while (/*CONSTCOND*/0)
#define __fetox(__s, __t, __d) \
do { \
__t d = __d; \
- __asm__ __volatile__ ("fetox" __s "; fnop" : "=f" (d) : "0" (d)); \
+ __asm__ __volatile__ ("nop; fetox" __s "; nop; fnop" : "=f" (d) : "0" (d)); \
} while (/*CONSTCOND*/0)
#define __fgetenv(__envp) \
- __asm__ __volatile__ ("fmovem%.l %/fpcr/%/fpsr/%/fpiar,%0" : "=m" (__envp))
+ __asm__ __volatile__ ("nop; fmovem%.l %/fpcr/%/fpsr/%/fpiar,%0" : "=m" (__envp))
#define __fsetenv(__envp) \
- __asm__ __volatile__ ("fmovem%.l %0,%/fpcr/%/fpsr/%/fpiar" : : "m" (__envp))
+ __asm__ __volatile__ ("nop; fmovem%.l %0,%/fpcr/%/fpsr/%/fpiar" : : "m" (__envp))
__BEGIN_DECLS
diff -r dad770520906 sys/arch/m68k/m68k/fpu.c
--- a/sys/arch/m68k/m68k/fpu.c Sun Nov 24 19:41:18 2024 +0000
+++ b/sys/arch/m68k/m68k/fpu.c Sat Nov 30 19:00:27 2024 +1100
@@ -72,6 +72,7 @@ fpu_probe(void)
* state, so we can determine which we have by
* examining the size of the FP state frame
*/
+ __asm("nop");
__asm("fnop");
nofault = NULL;
diff -r dad770520906 sys/arch/m68k/m68k/switch_subr.s
--- a/sys/arch/m68k/m68k/switch_subr.s Sun Nov 24 19:41:18 2024 +0000
+++ b/sys/arch/m68k/m68k/switch_subr.s Sat Nov 30 19:00:27 2024 +1100
@@ -80,6 +80,7 @@ GLOBAL(masterpaddr) | XXXcompatibility
ASENTRY_NOPROFILE(cpu_idle)
stop #PSL_LOWIPL
GLOBAL(_Idle) /* For sun2/sun3's clock.c ... */
+ nop
rts
/*
@@ -105,6 +106,7 @@ ENTRY(cpu_switchto)
jeq .Lcpu_switch_nofpsave | No Then don't attempt save.
lea PCB_FPCTX(%a1),%a2 | pointer to FP save area
+ nop
fsave (%a2) | save FP state
#if defined(M68020) || defined(M68030) || defined(M68040)
#if defined(M68060)
@@ -113,7 +115,9 @@ ENTRY(cpu_switchto)
#endif
tstb (%a2) | null state frame?
jeq .Lcpu_switch_nofpsave | yes, all done
+ nop
fmovem %fp0-%fp7,FPF_REGS(%a2) | save FP general registers
+ nop
fmovem %fpcr/%fpsr/%fpi,FPF_FPCR(%a2) | save FP control registers
#if defined(M68060)
jra .Lcpu_switch_nofpsave
@@ -123,9 +127,13 @@ ENTRY(cpu_switchto)
.Lcpu_switch_savfp60:
tstb 2(%a2) | null state frame?
jeq .Lcpu_switch_nofpsave | yes, all done
+ nop
fmovem %fp0-%fp7,FPF_REGS(%a2) | save FP general registers
+ nop
fmovem %fpcr,FPF_FPCR(%a2) | save FP control registers
+ nop
fmovem %fpsr,FPF_FPSR(%a2)
+ nop
fmovem %fpi,FPF_FPI(%a2)
#endif
.Lcpu_switch_nofpsave:
@@ -183,7 +191,9 @@ 2:
#endif
tstb (%a0) | null state frame?
jeq .Lcpu_switch_resfprest | yes, easy
+ nop
fmovem FPF_FPCR(%a0),%fpcr/%fpsr/%fpi | restore FP control registers
+ nop
fmovem FPF_REGS(%a0),%fp0-%fp7 | restore FP general registers
#if defined(M68060)
jra .Lcpu_switch_resfprest
@@ -194,12 +204,17 @@ 2:
.Lcpu_switch_resfp60rest1:
tstb 2(%a0) | null state frame?
jeq .Lcpu_switch_resfprest | yes, easy
+ nop
fmovem FPF_FPCR(%a0),%fpcr | restore FP control registers
+ nop
fmovem FPF_FPSR(%a0),%fpsr
+ nop
fmovem FPF_FPI(%a0),%fpi
+ nop
fmovem FPF_REGS(%a0),%fp0-%fp7 | restore FP general registers
#endif
.Lcpu_switch_resfprest:
+ nop
frestore (%a0) | restore state
#endif /* FPCOPROC */
#endif /* !_M68K_CUSTOM_FPU_CTX */
@@ -207,6 +222,7 @@ 2:
.Lcpu_switch_nofprest:
movl %d1,%d0 | return outgoing lwp
movl %d0,%a0 | (in a0, too)
+ nop
rts
/*
@@ -228,6 +244,7 @@ ENTRY(savectx)
jeq .Lsavectx_nofpsave | No? Then don't save state.
lea PCB_FPCTX(%a1),%a0 | pointer to FP save area
+ nop
fsave (%a0) | save FP state
#if defined(M68020) || defined(M68030) || defined(M68040)
#if defined(M68060)
@@ -236,7 +253,9 @@ ENTRY(savectx)
#endif
tstb (%a0) | null state frame?
jeq .Lsavectx_nofpsave | yes, all done
+ nop
fmovem %fp0-%fp7,FPF_REGS(%a0) | save FP general registers
+ nop
fmovem %fpcr/%fpsr/%fpi,FPF_FPCR(%a0) | save FP control registers
#if defined(M68060)
jra .Lsavectx_nofpsave
@@ -246,15 +265,20 @@ ENTRY(savectx)
.Lsavectx_savfp60:
tstb 2(%a0) | null state frame?
jeq .Lsavectx_nofpsave | yes, all done
+ nop
fmovem %fp0-%fp7,FPF_REGS(%a0) | save FP general registers
+ nop
fmovem %fpcr,FPF_FPCR(%a0) | save FP control registers
+ nop
fmovem %fpsr,FPF_FPSR(%a0)
+ nop
fmovem %fpi,FPF_FPI(%a0)
#endif
.Lsavectx_nofpsave:
#endif /* FPCOPROC */
#endif /* !_M68K_CUSTOM_FPU_CTX */
moveq #0,%d0 | return 0
+ nop
rts
#if !defined(M68010)
@@ -268,24 +292,33 @@ ENTRY(savectx)
*/
ENTRY(m68k_make_fpu_idle_frame)
clrl -(%sp)
+ nop
fnop
+ nop
frestore (%sp) | Effectively `resets' the FPU
+ nop
fnop
/* Loading '0.0' will change FPU to "idle". */
+ nop
fmove.d #0,%fp0
+ nop
fnop
/* Save the resulting idle frame into the buffer */
lea _C_LABEL(m68k_cached_fpu_idle_frame),%a0
+ nop
fsave (%a0)
fnop
/* Reset the FPU again */
+ nop
frestore (%sp)
+ nop
fnop
addql #4,%sp
+ nop
rts
#endif
@@ -295,6 +328,7 @@ ENTRY(m68k_make_fpu_idle_frame)
#ifdef FPCOPROC
ENTRY(m68881_save)
movl 4(%sp),%a0 | save area pointer
+ nop
fsave (%a0) | save state
#if defined(M68020) || defined(M68030) || defined(M68040)
#if defined(M68060)
@@ -304,20 +338,28 @@ ENTRY(m68881_save)
.Lm68881fpsave:
tstb (%a0) | null state frame?
jeq .Lm68881sdone | yes, all done
+ nop
fmovem %fp0-%fp7,FPF_REGS(%a0) | save FP general registers
+ nop
fmovem %fpcr/%fpsr/%fpi,FPF_FPCR(%a0) | save FP control registers
.Lm68881sdone:
+ nop
rts
#endif
#if defined(M68060)
.Lm68060fpsave:
tstb 2(%a0) | null state frame?
jeq .Lm68060sdone | yes, all done
+ nop
fmovem %fp0-%fp7,FPF_REGS(%a0) | save FP general registers
+ nop
fmovem %fpcr,FPF_FPCR(%a0) | save FP control registers
+ nop
fmovem %fpsr,FPF_FPSR(%a0)
+ nop
fmovem %fpi,FPF_FPI(%a0)
.Lm68060sdone:
+ nop
rts
#endif
@@ -331,22 +373,32 @@ ENTRY(m68881_restore)
.Lm68881fprestore:
tstb (%a0) | null state frame?
jeq .Lm68881rdone | yes, easy
+ nop
fmovem FPF_FPCR(%a0),%fpcr/%fpsr/%fpi | restore FP control registers
+ nop
fmovem FPF_REGS(%a0),%fp0-%fp7 | restore FP general registers
.Lm68881rdone:
+ nop
frestore (%a0) | restore state
+ nop
rts
#endif
#if defined(M68060)
.Lm68060fprestore:
tstb 2(%a0) | null state frame?
jeq .Lm68060fprdone | yes, easy
+ nop
fmovem FPF_FPCR(%a0),%fpcr | restore FP control registers
+ nop
fmovem FPF_FPSR(%a0),%fpsr
+ nop
fmovem FPF_FPI(%a0),%fpi
+ nop
fmovem FPF_REGS(%a0),%fp0-%fp7 | restore FP general registers
.Lm68060fprdone:
+ nop
frestore (%a0) | restore state
+ nop
rts
#endif
#endif
diff -r dad770520906 sys/arch/mac68k/mac68k/locore.s
--- a/sys/arch/mac68k/mac68k/locore.s Sun Nov 24 19:41:18 2024 +0000
+++ b/sys/arch/mac68k/mac68k/locore.s Sat Nov 30 19:00:27 2024 +1100
@@ -532,6 +532,7 @@ ENTRY_NOPROFILE(fpfault)
clrl %sp@- | no VA arg
movl _C_LABEL(curpcb),%a0 | current pcb
lea %a0@(PCB_FPCTX),%a0 | address of FP savearea
+ nop
fsave %a0@ | save state
#if defined(M68040) || defined(M68060)
/* always null state frame on 68040, 68060 */
@@ -544,7 +545,9 @@ ENTRY_NOPROFILE(fpfault)
movb %a0@(1),%d0 | get frame size
bset #3,%a0@(0,%d0:w) | set exc_pend bit of BIU
Lfptnull:
+ nop
fmovem %fpsr,%sp@- | push %fpsr as code argument
+ nop
frestore %a0@ | restore state
movl #T_FPERR,%sp@- | push type arg
jra _ASM_LABEL(faultstkadj) | call trap and deal with stack cleanup